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add some CPU read cycles (#233)

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* add some CPU read cycles

* more

* more

* more

* use scissor region for rdp interrupt calc
This commit is contained in:
Logan McNaughton 2025-02-09 17:34:29 +01:00 committed by GitHub
parent 99511b7cc6
commit 1c168c4bcd
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GPG Key ID: B5690EEEBB952194
13 changed files with 35 additions and 54 deletions
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52
parallel-rdp/interface.cpp
View File

@ -62,6 +62,7 @@ static int cmd_cur;
static int cmd_ptr;
static bool emu_running;
static GFX_INFO gfx_info;
static uint32_t region;
static const unsigned cmd_len_lut[64] = {
1,
@ -330,34 +331,6 @@ bool rdp_update_screen()
return emu_running;
}
static uint32_t viCalculateHorizonalWidth(uint32_t hstart, uint32_t xscale)
{
uint32_t start = (hstart >> 16) & 0x3FF;
uint32_t end = (hstart & 0x3FF);
uint32_t delta;
if (end > start)
delta = end - start;
else
delta = 0;
uint32_t scale = (xscale & 0xFFF);
return (delta * scale) / 0x400;
}
static uint32_t viCalculateVerticalHeight(uint32_t vstart, uint32_t yscale)
{
uint32_t start = (vstart >> 16) & 0x3FF;
uint32_t end = (vstart & 0x3FF);
uint32_t delta;
if (end > start)
delta = end - start;
else
delta = 0;
uint32_t scale = (yscale & 0xFFF);
return (delta * scale) / 0x800;
}
uint64_t rdp_process_commands()
{
uint64_t interrupt_timer = 0;
@ -406,6 +379,7 @@ uint64_t rdp_process_commands()
while (cmd_cur - cmd_ptr < 0)
{
uint32_t w1 = cmd_data[2 * cmd_cur];
uint32_t w2 = cmd_data[2 * cmd_cur + 1];
uint32_t command = (w1 >> 24) & 63;
int cmd_length = cmd_len_lut[command];
@ -418,21 +392,21 @@ uint64_t rdp_process_commands()
if (command >= 8)
processor->enqueue_command(cmd_length * 2, &cmd_data[2 * cmd_cur]);
if (RDP::Op(command) == RDP::Op::SetScissor)
{
uint32_t upper_left_x = ((w1 >> 12) & 0xFFF) >> 2;
uint32_t upper_left_y = (w1 & 0xFFF) >> 2;
uint32_t lower_right_x = ((w2 >> 12) & 0xFFF) >> 2;
uint32_t lower_right_y = (w2 & 0xFFF) >> 2;
region = (lower_right_x - upper_left_x) * (lower_right_y - upper_left_y);
}
if (RDP::Op(command) == RDP::Op::SyncFull)
{
processor->wait_for_timeline(processor->signal_timeline());
uint32_t width = viCalculateHorizonalWidth(*gfx_info.VI_H_START_REG, *gfx_info.VI_X_SCALE_REG);
if (width == 0)
{
width = 320;
}
uint32_t height = viCalculateVerticalHeight(*gfx_info.VI_V_START_REG, *gfx_info.VI_Y_SCALE_REG);
if (height == 0)
{
height = 240;
}
interrupt_timer = width * height;
interrupt_timer = region;
if (interrupt_timer == 0)
interrupt_timer = 5000;
}
cmd_cur += cmd_length;

4
parallel-rdp/interface.hpp
View File

@ -16,10 +16,6 @@ extern "C"
uint32_t *DPC_START_REG;
uint32_t *DPC_END_REG;
uint32_t *DPC_STATUS_REG;
uint32_t *VI_H_START_REG;
uint32_t *VI_V_START_REG;
uint32_t *VI_X_SCALE_REG;
uint32_t *VI_Y_SCALE_REG;
} GFX_INFO;
void rdp_init(void *_window, GFX_INFO _gfx_info, bool _upscale, bool _integer_scaling, bool _fullscreen);

6
src/device/ai.rs
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@ -111,7 +111,7 @@ pub fn read_regs(
_access_size: device::memory::AccessSize,
) -> u32 {
let reg = (address & 0xFFFF) >> 2;
match reg as u32 {
let return_value = match reg as u32 {
AI_LEN_REG => {
let value = get_remaining_dma_length(device);
if value < device.ai.last_read {
@ -128,7 +128,9 @@ pub fn read_regs(
value as u32
}
_ => device.ai.regs[reg as usize],
}
};
device::cop0::add_cycles(device, 20);
return_value
}
pub fn write_regs(device: &mut device::Device, address: u64, value: u32, mask: u32) {

1
src/device/cart/sc64.rs
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@ -37,6 +37,7 @@ pub fn read_regs(
address: u64,
_access_size: device::memory::AccessSize,
) -> u32 {
device::cop0::add_cycles(device, 20);
if device.sc64.regs_locked {
return 0;
}

1
src/device/mi.rs
View File

@ -53,6 +53,7 @@ pub fn read_regs(
address: u64,
_access_size: device::memory::AccessSize,
) -> u32 {
device::cop0::add_cycles(device, 20);
device.mi.regs[((address & 0xFFFF) >> 2) as usize]
}

1
src/device/pi.rs
View File

@ -40,6 +40,7 @@ pub fn read_regs(
address: u64,
_access_size: device::memory::AccessSize,
) -> u32 {
device::cop0::add_cycles(device, 20);
let reg = (address & 0xFFFF) >> 2;
match reg as u32 {
PI_WR_LEN_REG | PI_RD_LEN_REG => 0x7F,

2
src/device/rdp.rs
View File

@ -53,6 +53,7 @@ pub fn read_regs_dpc(
address: u64,
_access_size: device::memory::AccessSize,
) -> u32 {
device::cop0::add_cycles(device, 20);
let reg = (address & 0xFFFF) >> 2;
match reg as u32 {
DPC_STATUS_REG => {
@ -131,6 +132,7 @@ pub fn read_regs_dps(
address: u64,
_access_size: device::memory::AccessSize,
) -> u32 {
device::cop0::add_cycles(device, 20);
device.rdp.regs_dps[((address & 0xFFFF) >> 2) as usize]
}

1
src/device/rdram.rs
View File

@ -73,6 +73,7 @@ pub fn read_regs(
address: u64,
_access_size: device::memory::AccessSize,
) -> u32 {
device::cop0::add_cycles(device, 20);
let chip_id = (address >> 13) & 3;
let reg = (address & 0x3FF) >> 2;
match reg as u32 {

1
src/device/ri.rs
View File

@ -20,6 +20,7 @@ pub fn read_regs(
address: u64,
_access_size: device::memory::AccessSize,
) -> u32 {
device::cop0::add_cycles(device, 20);
if ((address & 0xFFFF) >> 2) as u32 == RI_SELECT_REG && !device.ri.ram_init {
device::cop0::add_cycles(device, device.cpu.clock_rate / 2); // hack, simulate RDRAM initialization
device.ri.ram_init = true;

6
src/device/rsp_interface.rs
View File

@ -101,8 +101,10 @@ pub fn read_mem_fast(
pub fn read_mem(
device: &mut device::Device,
address: u64,
_access_size: device::memory::AccessSize,
access_size: device::memory::AccessSize,
) -> u32 {
device::cop0::add_cycles(device, access_size as u64 / 4);
let masked_address = address as usize & RSP_MEM_MASK;
u32::from_be_bytes(
device.rsp.mem[masked_address..masked_address + 4]
@ -264,6 +266,7 @@ pub fn read_regs(
address: u64,
_access_size: device::memory::AccessSize,
) -> u32 {
device::cop0::add_cycles(device, 20);
let reg = (address & 0xFFFF) >> 2;
match reg as u32 {
SP_DMA_BUSY_REG | SP_DMA_FULL_REG => {
@ -321,6 +324,7 @@ pub fn read_regs2(
address: u64,
_access_size: device::memory::AccessSize,
) -> u32 {
device::cop0::add_cycles(device, 20);
device.rsp.regs2[((address & 0xFFFF) >> 2) as usize]
}

1
src/device/si.rs
View File

@ -31,6 +31,7 @@ pub fn read_regs(
address: u64,
_access_size: device::memory::AccessSize,
) -> u32 {
device::cop0::add_cycles(device, 20);
device.si.regs[((address & 0xFFFF) >> 2) as usize]
}

9
src/device/vi.rs
View File

@ -12,11 +12,11 @@ const VI_CURRENT_REG: u32 = 4;
const VI_V_SYNC_REG: u32 = 6;
const VI_H_SYNC_REG: u32 = 7;
//const VI_LEAP_REG: u32 = 8;
pub const VI_H_START_REG: u32 = 9;
pub const VI_V_START_REG: u32 = 10;
//const VI_H_START_REG: u32 = 9;
//const VI_V_START_REG: u32 = 10;
//const VI_V_BURST_REG: u32 = 11;
pub const VI_X_SCALE_REG: u32 = 12;
pub const VI_Y_SCALE_REG: u32 = 13;
//const VI_X_SCALE_REG: u32 = 12;
//const VI_Y_SCALE_REG: u32 = 13;
pub const VI_REGS_COUNT: u32 = 14;
pub struct Vi {
@ -89,6 +89,7 @@ pub fn read_regs(
if reg as u32 == VI_CURRENT_REG {
set_current_line(device)
}
device::cop0::add_cycles(device, 20);
device.vi.regs[reg as usize]
}

4
src/ui/video.rs
View File

@ -33,10 +33,6 @@ pub fn init(device: &mut device::Device, fullscreen: bool) {
DPC_START_REG: &mut device.rdp.regs_dpc[device::rdp::DPC_START_REG as usize],
DPC_END_REG: &mut device.rdp.regs_dpc[device::rdp::DPC_END_REG as usize],
DPC_STATUS_REG: &mut device.rdp.regs_dpc[device::rdp::DPC_STATUS_REG as usize],
VI_H_START_REG: &mut device.vi.regs[device::vi::VI_H_START_REG as usize],
VI_V_START_REG: &mut device.vi.regs[device::vi::VI_V_START_REG as usize],
VI_X_SCALE_REG: &mut device.vi.regs[device::vi::VI_X_SCALE_REG as usize],
VI_Y_SCALE_REG: &mut device.vi.regs[device::vi::VI_Y_SCALE_REG as usize],
};
unsafe {