some mbc3 rtc code (#284)
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@ -10,6 +10,11 @@ pub struct GbCart {
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pub ram_enabled: bool,
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pub ram_bank: u16,
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pub rom_bank: u32,
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pub set_latch: bool,
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pub latch_second: u8,
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pub latch_minute: u8,
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pub latch_hour: u8,
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pub latch_day: u16,
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}
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#[derive(Default, Copy, Clone, serde::Serialize, serde::Deserialize)]
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@ -40,7 +45,10 @@ fn write_mbc3(
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} else if address < 0x6000 {
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cart.ram_bank = (value & 0xf) as u16;
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} else if address < 0x8000 {
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// RTC not implemented
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if !cart.set_latch && value != 0 {
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// not implemented
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}
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cart.set_latch = value != 0;
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} else if (0xa000..0xc000).contains(&address) {
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if !cart.ram_enabled {
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return;
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@ -50,7 +58,28 @@ fn write_mbc3(
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cart.ram[banked_address as usize..banked_address as usize + size]
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.copy_from_slice(&pif_ram[data..data + size]);
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} else {
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// RTC not implemented
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match cart.ram_bank {
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0x8 => {
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cart.latch_second = value;
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}
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0x9 => {
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cart.latch_minute = value;
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}
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0xA => {
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cart.latch_hour = value;
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}
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0xB => {
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cart.latch_day &= 0xFF00;
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cart.latch_day |= value as u16;
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}
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0xC => {
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cart.latch_day &= 0x00FF;
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cart.latch_day |= (value as u16) << 8;
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}
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_ => {
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panic!("Unsupported ram bank {:x}", cart.ram_bank);
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}
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}
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}
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} else {
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panic!("Unsupported write address {:x}", address);
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@ -91,9 +120,18 @@ fn read_mbc3(
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);
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}
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} else {
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// RTC not implemented
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let latch = match cart.ram_bank {
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0x8 => cart.latch_second,
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0x9 => cart.latch_minute,
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0xA => cart.latch_hour,
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0xB => cart.latch_day as u8,
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0xC => (cart.latch_day >> 8) as u8,
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_ => {
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panic!("Unsupported ram bank {:x}", cart.ram_bank);
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}
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};
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for i in 0..size {
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pif_ram[data + i] = 0;
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pif_ram[data + i] = latch;
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}
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}
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} else {
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