diff --git a/src/device.rs b/src/device.rs index 0b9c212..a6fa71d 100644 --- a/src/device.rs +++ b/src/device.rs @@ -201,6 +201,7 @@ impl Device { broken: false, halted: false, sync_point: false, + cycle_counter: 0, gpr: [0; 32], vpr: [0; 32], reciprocals: [0; 512], diff --git a/src/device/rsp_cpu.rs b/src/device/rsp_cpu.rs index f2788a5..c83188b 100644 --- a/src/device/rsp_cpu.rs +++ b/src/device/rsp_cpu.rs @@ -27,6 +27,7 @@ pub struct Cpu { pub broken: bool, pub halted: bool, pub sync_point: bool, + pub cycle_counter: u64, pub shuffle: [__m128i; 16], pub gpr: [u32; 32], pub vpr: [u128; 32], @@ -64,7 +65,7 @@ pub fn in_delay_slot_taken(device: &mut device::Device) -> bool { pub fn run(device: &mut device::Device) -> u64 { device.rsp.cpu.broken = false; - let mut cycle_counter = 0; + device.rsp.cpu.cycle_counter = 0; while !device.rsp.cpu.sync_point { device.rsp.cpu.instruction_type = InstructionType::Su; device.rsp.cpu.gpr[0] = 0; // gpr 0 is read only @@ -114,19 +115,19 @@ pub fn run(device: &mut device::Device) -> u64 { device.rsp.regs2[device::rsp_interface::SP_PC_REG as usize] &= 0xFFC; if device.rsp.cpu.instruction_type == device.rsp.cpu.last_instruction_type { - cycle_counter += 1; + device.rsp.cpu.cycle_counter += 1; device.rsp.cpu.pipeline_full = false; } else { device.rsp.cpu.last_instruction_type = device.rsp.cpu.instruction_type; if device.rsp.cpu.pipeline_full { - cycle_counter += 1; + device.rsp.cpu.cycle_counter += 1; device.rsp.cpu.pipeline_full = false; } else { device.rsp.cpu.pipeline_full = true; } } } - return (cycle_counter as f64 * 1.5) as u64; // converting RCP clock to CPU clock + return (device.rsp.cpu.cycle_counter as f64 * 1.5) as u64; // converting RCP clock to CPU clock } pub fn decode_opcode(device: &mut device::Device, opcode: u32) -> fn(&mut device::Device, u32) { diff --git a/src/device/rsp_su_instructions.rs b/src/device/rsp_su_instructions.rs index 697e2e9..c742d65 100644 --- a/src/device/rsp_su_instructions.rs +++ b/src/device/rsp_su_instructions.rs @@ -440,6 +440,7 @@ pub fn mfc0(device: &mut device::Device, opcode: u32) { device::memory::AccessSize::Word, ) } + device.rsp.cpu.cycle_counter += 4; // needed for DK64 device.rsp.cpu.sync_point = true; }