clippy fixes (#22)
* clippy fixes * typo fix * more * more * more * more * more * more * add workflow
This commit is contained in:
Logan McNaughton
GitHub
parent
f969e71f17
commit
46625f3104
28
.github/workflows/lint.yml
vendored
Normal file
28
.github/workflows/lint.yml
vendored
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@ -0,0 +1,28 @@
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name: Rust-lint
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on:
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push:
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branches: ["main"]
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pull_request:
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branches: ["main"]
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env:
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CARGO_TERM_COLOR: always
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jobs:
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lint-linux:
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runs-on: ubuntu-latest
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steps:
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- uses: actions/checkout@v4
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with:
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submodules: recursive
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- name: Install sdl2 headers
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run: |
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sudo apt -y install libsdl2-dev
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- name: Update rust
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run: |
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rustup update
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rustup component add clippy
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- name: Lint
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run: |
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cargo clippy -- -Dwarnings
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@ -62,7 +62,7 @@ impl Device {
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}
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Device {
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ui: ui::Ui::new(),
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byte_swap: byte_swap,
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byte_swap,
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cpu: cpu::Cpu {
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cop0: cop0::Cop0 {
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regs: [0; cop0::COP0_REGS_COUNT as usize],
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@ -32,7 +32,7 @@ pub fn get_remaining_dma_length(device: &mut device::Device) -> u64 {
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}
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let next_ai_event = device::events::get_event(device, device::events::EventType::AI);
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if next_ai_event == None {
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if next_ai_event.is_none() {
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return 0;
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}
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@ -40,15 +40,15 @@ pub fn get_remaining_dma_length(device: &mut device::Device) -> u64 {
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next_ai_event.unwrap().count - device.cpu.cop0.regs[device::cop0::COP0_COUNT_REG as usize];
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let dma_length = remaining_dma_duration * device.ai.fifo[0].length / device.ai.fifo[0].duration;
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return dma_length & !7;
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dma_length & !7
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}
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pub fn get_dma_duration(device: &mut device::Device) -> u64 {
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pub fn get_dma_duration(device: &device::Device) -> u64 {
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let samples_per_sec = device.vi.clock / (1 + device.ai.regs[AI_DACRATE_REG as usize]) as u64;
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let bytes_per_sample = 4; /* XXX: assume 16bit stereo - should depends on bitrate instead */
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let length = (device.ai.regs[AI_LEN_REG as usize] & !7) as u64;
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return length * (device.cpu.clock_rate / (bytes_per_sample * samples_per_sec));
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length * (device.cpu.clock_rate / (bytes_per_sample * samples_per_sec))
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}
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pub fn do_dma(device: &mut device::Device) {
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@ -58,11 +58,8 @@ pub fn do_dma(device: &mut device::Device) {
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device.ai.fifo[0].address += 0x2000;
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}
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if ((device.ai.fifo[0].address + device.ai.fifo[0].length) & 0x1FFF) == 0 {
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device.ai.delayed_carry = true;
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} else {
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device.ai.delayed_carry = false;
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}
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device.ai.delayed_carry =
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((device.ai.fifo[0].address + device.ai.fifo[0].length) & 0x1FFF) == 0;
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/* schedule end of dma event */
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device::events::create_event(
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@ -128,9 +125,9 @@ pub fn read_regs(
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device.ai.last_read = value;
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}
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return value as u32;
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value as u32
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}
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_ => return device.ai.regs[reg as usize],
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_ => device.ai.regs[reg as usize],
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}
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}
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@ -18,9 +18,9 @@ pub struct DCache {
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pub words: [u32; 4],
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}
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pub fn icache_hit(device: &mut device::Device, line_index: usize, phys_address: u64) -> bool {
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return device.memory.icache[line_index].valid
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&& (device.memory.icache[line_index].tag & 0x1ffffffc) == (phys_address & !0xFFF) as u32;
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pub fn icache_hit(device: &device::Device, line_index: usize, phys_address: u64) -> bool {
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device.memory.icache[line_index].valid
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&& (device.memory.icache[line_index].tag & 0x1ffffffc) == (phys_address & !0xFFF) as u32
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}
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pub fn icache_writeback(device: &mut device::Device, line_index: usize) {
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@ -31,7 +31,7 @@ pub fn icache_writeback(device: &mut device::Device, line_index: usize) {
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& 0x1ffffffc) as u64;
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device.memory.memory_map_write[(cache_address >> 16) as usize](
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device,
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cache_address | 0x0,
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cache_address,
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device.memory.icache[line_index].words[0],
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0xFFFFFFFF,
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);
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@ -90,7 +90,7 @@ pub fn icache_fill(device: &mut device::Device, line_index: usize, phys_address:
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device.memory.icache[line_index].words[0] = device.memory.memory_map_read
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[(cache_address >> 16) as usize](
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device,
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cache_address | 0x0,
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cache_address,
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device::memory::AccessSize::Icache,
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);
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device.memory.icache[line_index].words[1] = device.memory.memory_map_read
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@ -166,9 +166,9 @@ pub fn icache_fetch(device: &mut device::Device, phys_address: u64) {
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);
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}
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pub fn dcache_hit(device: &mut device::Device, line_index: usize, phys_address: u64) -> bool {
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return device.memory.dcache[line_index].valid
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&& (device.memory.dcache[line_index].tag & 0x1ffffffc) == (phys_address & !0xFFF) as u32;
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pub fn dcache_hit(device: &device::Device, line_index: usize, phys_address: u64) -> bool {
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device.memory.dcache[line_index].valid
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&& (device.memory.dcache[line_index].tag & 0x1ffffffc) == (phys_address & !0xFFF) as u32
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}
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pub fn dcache_writeback(device: &mut device::Device, line_index: usize) {
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@ -181,7 +181,7 @@ pub fn dcache_writeback(device: &mut device::Device, line_index: usize) {
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& 0x1ffffffc) as u64;
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device.memory.memory_map_write[(cache_address >> 16) as usize](
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device,
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cache_address | 0x0,
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cache_address,
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device.memory.dcache[line_index].words[0],
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0xFFFFFFFF,
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);
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@ -218,7 +218,7 @@ pub fn dcache_fill(device: &mut device::Device, line_index: usize, phys_address:
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device.memory.dcache[line_index].words[0] = device.memory.memory_map_read
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[(cache_address >> 16) as usize](
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device,
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cache_address | 0x0,
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cache_address,
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device::memory::AccessSize::Dcache,
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);
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device.memory.dcache[line_index].words[1] = device.memory.memory_map_read
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@ -251,7 +251,7 @@ pub fn dcache_read(device: &mut device::Device, phys_address: u64) -> u32 {
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} else {
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device::cop0::add_cycles(device, 1)
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}
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return device.memory.dcache[line_index].words[((phys_address >> 2) & 3) as usize];
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device.memory.dcache[line_index].words[((phys_address >> 2) & 3) as usize]
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}
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pub fn dcache_write(device: &mut device::Device, phys_address: u64, value: u32, mask: u32) {
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@ -24,7 +24,7 @@ pub struct AfRtc {
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pub fn byte2bcd(mut n: u32) -> u8 {
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n %= 100;
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return (((n / 10) << 4) | (n % 10)) as u8;
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(((n / 10) << 4) | (n % 10)) as u8
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}
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pub fn process(device: &mut device::Device, channel: usize) {
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@ -102,7 +102,7 @@ pub fn format_eeprom(device: &mut device::Device) {
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}
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pub fn eeprom_read_block(device: &mut device::Device, block: usize, offset: usize) {
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let address = device.pif.ram[block as usize] as usize * EEPROM_BLOCK_SIZE;
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let address = device.pif.ram[block] as usize * EEPROM_BLOCK_SIZE;
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format_eeprom(device);
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@ -111,14 +111,14 @@ pub fn eeprom_read_block(device: &mut device::Device, block: usize, offset: usiz
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}
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pub fn eeprom_write_block(device: &mut device::Device, block: usize, offset: usize, status: usize) {
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let address = device.pif.ram[block as usize] as usize * EEPROM_BLOCK_SIZE;
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let address = device.pif.ram[block] as usize * EEPROM_BLOCK_SIZE;
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format_eeprom(device);
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device.ui.saves.eeprom.0[address..address + EEPROM_BLOCK_SIZE]
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.copy_from_slice(&device.pif.ram[offset..offset + EEPROM_BLOCK_SIZE]);
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device.pif.ram[status as usize] = 0x00;
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device.pif.ram[status] = 0x00;
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device.ui.saves.eeprom.1 = true
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}
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@ -137,18 +137,18 @@ pub fn time2data(device: &mut device::Device, offset: usize) {
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}
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pub fn af_rtc_read_block(device: &mut device::Device, block: usize, offset: usize, status: usize) {
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match device.pif.ram[block as usize] {
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match device.pif.ram[block] {
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0 => {
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device.pif.ram[offset] = device.cart.rtc.control as u8;
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device.pif.ram[offset + 1] = (device.cart.rtc.control >> 8) as u8;
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device.pif.ram[status as usize] = 0x00;
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device.pif.ram[status] = 0x00;
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}
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1 => {
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panic!("AF-RTC reading block 1 is not implemented !");
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}
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2 => {
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time2data(device, offset);
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device.pif.ram[status as usize] = 0x00;
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device.pif.ram[status] = 0x00;
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}
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_ => {
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panic!("AF-RTC read invalid block");
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@ -156,11 +156,11 @@ pub fn af_rtc_read_block(device: &mut device::Device, block: usize, offset: usiz
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}
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}
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pub fn af_rtc_write_block(device: &mut device::Device, block: usize, offset: usize, status: usize) {
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match device.pif.ram[block as usize] {
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match device.pif.ram[block] {
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0 => {
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device.cart.rtc.control =
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(device.pif.ram[offset + 1] as u16) << 8 | device.pif.ram[offset] as u16;
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device.pif.ram[status as usize] = 0x00;
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device.pif.ram[status] = 0x00;
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}
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1 => {
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/* block 1 read-only when control[0] is set */
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@ -28,11 +28,11 @@ pub fn read_mem_fast(
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_access_size: device::memory::AccessSize,
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) -> u32 {
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let masked_address = address as usize & CART_MASK;
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return u32::from_be_bytes(
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u32::from_be_bytes(
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device.cart.rom[masked_address..masked_address + 4]
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.try_into()
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.unwrap(),
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);
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)
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}
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pub fn read_mem(
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@ -45,14 +45,14 @@ pub fn read_mem(
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// well known cart ROM oddity, if a read is perfomed while PI_STATUS_IO_BUSY is set, the latched value is returned rather than the data at the specified address
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if device.pi.regs[device::pi::PI_STATUS_REG as usize] & device::pi::PI_STATUS_IO_BUSY != 0 {
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return device.cart.latch;
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device.cart.latch
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} else {
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let masked_address = address as usize & CART_MASK;
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return u32::from_be_bytes(
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u32::from_be_bytes(
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device.cart.rom[masked_address..masked_address + 4]
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.try_into()
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.unwrap(),
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);
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)
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}
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}
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@ -92,7 +92,7 @@ pub fn dma_read(
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device.ui.saves.romsave.1 = true;
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return device::pi::calculate_cycles(device, 1, length);
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device::pi::calculate_cycles(device, 1, length)
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}
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// cart is big endian, rdram is native endian
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@ -116,7 +116,7 @@ pub fn dma_write(
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device.rdram.mem[i as usize ^ device.byte_swap] = 0;
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i += 1;
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}
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return device::pi::calculate_cycles(device, 1, length);
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device::pi::calculate_cycles(device, 1, length)
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}
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pub fn init(device: &mut device::Device, rom_file: Vec<u8>) {
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@ -78,7 +78,7 @@ pub fn pak_read_block(
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(device.pif.ram[addr_acrc] as u16) << 8 | (device.pif.ram[addr_acrc + 1] & 0xe0) as u16;
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let handler = device.pif.channels[channel].pak_handler;
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if !handler.is_none() {
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if handler.is_some() {
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(handler.unwrap().read)(device, channel, address, data, PAK_CHUNK_SIZE);
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device.pif.ram[dcrc] = pak_data_crc(device, data, PAK_CHUNK_SIZE)
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} else {
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@ -97,7 +97,7 @@ pub fn pak_write_block(
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(device.pif.ram[addr_acrc] as u16) << 8 | (device.pif.ram[addr_acrc + 1] & 0xe0) as u16;
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let handler = device.pif.channels[channel].pak_handler;
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if !handler.is_none() {
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if handler.is_some() {
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(handler.unwrap().write)(device, channel, address, data, PAK_CHUNK_SIZE);
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device.pif.ram[dcrc] = pak_data_crc(device, data, PAK_CHUNK_SIZE)
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} else {
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@ -105,19 +105,14 @@ pub fn pak_write_block(
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}
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}
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pub fn pak_data_crc(device: &mut device::Device, data_offset: usize, size: usize) -> u8 {
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pub fn pak_data_crc(device: &device::Device, data_offset: usize, size: usize) -> u8 {
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let mut i = 0;
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let mut crc = 0;
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while i <= size {
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let mut mask = 0x80;
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while mask >= 1 {
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let xor_tap;
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if crc & 0x80 != 0 {
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xor_tap = 0x85
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} else {
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xor_tap = 0x00
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}
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let xor_tap = if crc & 0x80 != 0 { 0x85 } else { 0x00 };
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crc <<= 1;
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if i != size && (device.pif.ram[data_offset + i] & mask) != 0 {
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crc |= 1;
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@ -127,5 +122,5 @@ pub fn pak_data_crc(device: &mut device::Device, data_offset: usize, size: usize
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}
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i += 1;
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}
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return crc;
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crc
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}
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@ -174,12 +174,12 @@ pub fn reserved(device: &mut device::Device, _opcode: u32) {
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device::exceptions::reserved_exception(device, 0);
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}
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pub fn get_control_registers(device: &mut device::Device, index: u32) -> u64 {
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pub fn get_control_registers(device: &device::Device, index: u32) -> u64 {
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match index {
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COP0_COUNT_REG => return device.cpu.cop0.regs[index as usize] >> 1,
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COP0_RANDOM_REG => return set_random_register(device),
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7 | 21 | 22 | 23 | 24 | 25 | 31 => return device.cpu.cop0.reg_latch,
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_ => return device.cpu.cop0.regs[index as usize],
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COP0_COUNT_REG => device.cpu.cop0.regs[index as usize] >> 1,
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COP0_RANDOM_REG => set_random_register(device),
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7 | 21 | 22 | 23 | 24 | 25 | 31 => device.cpu.cop0.reg_latch,
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_ => device.cpu.cop0.regs[index as usize],
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}
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}
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@ -243,13 +243,13 @@ pub fn compare_event(device: &mut device::Device) {
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device::exceptions::check_pending_interrupts(device);
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}
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pub fn set_random_register(device: &mut device::Device) -> u64 {
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pub fn set_random_register(device: &device::Device) -> u64 {
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if device.cpu.cop0.regs[COP0_WIRED_REG as usize] > 31 {
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return (u64::MAX - device.cpu.cop0.regs[COP0_COUNT_REG as usize]) & 0x3F;
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(u64::MAX - device.cpu.cop0.regs[COP0_COUNT_REG as usize]) & 0x3F
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} else {
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return (u64::MAX - device.cpu.cop0.regs[COP0_COUNT_REG as usize])
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(u64::MAX - device.cpu.cop0.regs[COP0_COUNT_REG as usize])
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% (32 - device.cpu.cop0.regs[COP0_WIRED_REG as usize])
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+ device.cpu.cop0.regs[COP0_WIRED_REG as usize];
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+ device.cpu.cop0.regs[COP0_WIRED_REG as usize]
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}
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}
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@ -340,10 +340,10 @@ pub fn reserved(device: &mut device::Device, opcode: u32) {
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device::exceptions::reserved_exception(device, device::cop0::COP0_CAUSE_CE1);
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}
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pub fn get_control_registers_fpu(device: &mut device::Device, index: u32) -> u32 {
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pub fn get_control_registers_fpu(device: &device::Device, index: u32) -> u32 {
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match index {
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0 => return device.cpu.cop1.fcr0,
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31 => return device.cpu.cop1.fcr31,
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0 => device.cpu.cop1.fcr0,
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31 => device.cpu.cop1.fcr31,
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_ => {
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panic!("unknown FCR register")
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}
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@ -356,7 +356,7 @@ pub fn set_control_registers_fpu(device: &mut device::Device, index: u32, data:
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}
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31 => {
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device.cpu.cop1.fcr31 = data & FCR31_WRITE_MASK as u32;
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device.cpu.cop1.fcr31 = data & FCR31_WRITE_MASK;
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// the Cause bits are ANDed with the Enable bits to check for exceptions
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// "Unimplemented Operation" has no Enable bit and always causes an exception
|
||||
if (device.cpu.cop1.fcr31 & FCR31_CAUSE_MASK) >> 5
|
||||
@ -399,23 +399,22 @@ pub fn set_fpr_single(device: &mut device::Device, index: usize, value: f32, cle
|
||||
device.cpu.cop1.fgr32[index] = bytes;
|
||||
} else {
|
||||
let bytes_lo = bytes;
|
||||
let bytes_hi: [u8; 4];
|
||||
if clear_high {
|
||||
bytes_hi = [0, 0, 0, 0];
|
||||
let bytes_hi: [u8; 4] = if clear_high {
|
||||
[0, 0, 0, 0]
|
||||
} else {
|
||||
bytes_hi = device.cpu.cop1.fgr64[index][4..8].try_into().unwrap()
|
||||
}
|
||||
device.cpu.cop1.fgr64[index][4..8].try_into().unwrap()
|
||||
};
|
||||
device.cpu.cop1.fgr64[index] = [bytes_lo, bytes_hi].concat().try_into().unwrap();
|
||||
}
|
||||
}
|
||||
|
||||
pub fn get_fpr_single(device: &mut device::Device, index: usize) -> f32 {
|
||||
pub fn get_fpr_single(device: &device::Device, index: usize) -> f32 {
|
||||
if device.cpu.cop0.regs[device::cop0::COP0_STATUS_REG as usize] & device::cop0::COP0_STATUS_FR
|
||||
== 0
|
||||
{
|
||||
return f32::from_ne_bytes(device.cpu.cop1.fgr32[index]);
|
||||
f32::from_ne_bytes(device.cpu.cop1.fgr32[index])
|
||||
} else {
|
||||
return f32::from_ne_bytes(device.cpu.cop1.fgr64[index][0..4].try_into().unwrap());
|
||||
f32::from_ne_bytes(device.cpu.cop1.fgr64[index][0..4].try_into().unwrap())
|
||||
}
|
||||
}
|
||||
|
||||
@ -431,15 +430,15 @@ pub fn set_fpr_double(device: &mut device::Device, index: usize, value: f64) {
|
||||
}
|
||||
}
|
||||
|
||||
pub fn get_fpr_double(device: &mut device::Device, index: usize) -> f64 {
|
||||
pub fn get_fpr_double(device: &device::Device, index: usize) -> f64 {
|
||||
if device.cpu.cop0.regs[device::cop0::COP0_STATUS_REG as usize] & device::cop0::COP0_STATUS_FR
|
||||
== 0
|
||||
{
|
||||
let bytes_lo = device.cpu.cop1.fgr32[index & !1];
|
||||
let bytes_hi = device.cpu.cop1.fgr32[(index & !1) + 1];
|
||||
return f64::from_ne_bytes([bytes_lo, bytes_hi].concat().try_into().unwrap());
|
||||
f64::from_ne_bytes([bytes_lo, bytes_hi].concat().try_into().unwrap())
|
||||
} else {
|
||||
return f64::from_ne_bytes(device.cpu.cop1.fgr64[index]);
|
||||
f64::from_ne_bytes(device.cpu.cop1.fgr64[index])
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@ -36,7 +36,7 @@ pub struct Cpu {
|
||||
pub next_event: usize,
|
||||
}
|
||||
|
||||
pub fn decode_opcode(device: &mut device::Device, opcode: u32) -> fn(&mut device::Device, u32) {
|
||||
pub fn decode_opcode(device: &device::Device, opcode: u32) -> fn(&mut device::Device, u32) {
|
||||
match opcode >> 26 {
|
||||
0 => device.cpu.special_instrs[(opcode & 0x3F) as usize], // SPECIAL
|
||||
1 => device.cpu.regimm_instrs[((opcode >> 16) & 0x1F) as usize], // REGIMM
|
||||
@ -221,13 +221,13 @@ pub fn init(device: &mut device::Device) {
|
||||
device::cop2::init(device);
|
||||
}
|
||||
|
||||
pub fn in_delay_slot(device: &mut device::Device) -> bool {
|
||||
return device.cpu.branch_state.state == State::DelaySlotTaken
|
||||
|| device.cpu.branch_state.state == State::DelaySlotNotTaken;
|
||||
pub fn in_delay_slot(device: &device::Device) -> bool {
|
||||
device.cpu.branch_state.state == State::DelaySlotTaken
|
||||
|| device.cpu.branch_state.state == State::DelaySlotNotTaken
|
||||
}
|
||||
|
||||
pub fn in_delay_slot_taken(device: &mut device::Device) -> bool {
|
||||
return device.cpu.branch_state.state == State::DelaySlotTaken;
|
||||
pub fn in_delay_slot_taken(device: &device::Device) -> bool {
|
||||
device.cpu.branch_state.state == State::DelaySlotTaken
|
||||
}
|
||||
|
||||
pub fn run(device: &mut device::Device) {
|
||||
|
||||
@ -1,51 +1,51 @@
|
||||
use crate::device;
|
||||
|
||||
pub fn rd(opcode: u32) -> u32 {
|
||||
return (opcode >> 11) & 0x1F;
|
||||
(opcode >> 11) & 0x1F
|
||||
}
|
||||
|
||||
pub fn rs(opcode: u32) -> u32 {
|
||||
return (opcode >> 21) & 0x1F;
|
||||
(opcode >> 21) & 0x1F
|
||||
}
|
||||
|
||||
pub fn rt(opcode: u32) -> u32 {
|
||||
return (opcode >> 16) & 0x1F;
|
||||
(opcode >> 16) & 0x1F
|
||||
}
|
||||
|
||||
pub fn sa(opcode: u32) -> u32 {
|
||||
return (opcode >> 6) & 0x1F;
|
||||
(opcode >> 6) & 0x1F
|
||||
}
|
||||
|
||||
pub fn imm(opcode: u32) -> u16 {
|
||||
return opcode as u16;
|
||||
opcode as u16
|
||||
}
|
||||
|
||||
pub fn se32(value: i32) -> u64 {
|
||||
return value as i64 as u64;
|
||||
value as i64 as u64
|
||||
}
|
||||
|
||||
pub fn se16(value: i16) -> u64 {
|
||||
return value as i64 as u64;
|
||||
value as i64 as u64
|
||||
}
|
||||
|
||||
pub fn se8(value: i8) -> u64 {
|
||||
return value as i64 as u64;
|
||||
value as i64 as u64
|
||||
}
|
||||
|
||||
pub fn bshift<T: Into<u64>>(address: T) -> u64 {
|
||||
return ((address.into() & 3) ^ 3) << 3;
|
||||
((address.into() & 3) ^ 3) << 3
|
||||
}
|
||||
|
||||
pub fn hshift<T: Into<u64>>(address: T) -> u64 {
|
||||
return ((address.into() & 2) ^ 2) << 3;
|
||||
((address.into() & 2) ^ 2) << 3
|
||||
}
|
||||
|
||||
pub fn bits_below_mask<T: Into<u64>>(x: T) -> u64 {
|
||||
return (1 << x.into()) - 1;
|
||||
(1 << x.into()) - 1
|
||||
}
|
||||
|
||||
pub fn bits_above_mask<T: Into<u64>>(x: T) -> u64 {
|
||||
return !bits_below_mask(x);
|
||||
!bits_below_mask(x)
|
||||
}
|
||||
|
||||
pub fn check_relative_idle_loop(device: &mut device::Device, opcode: u32) {
|
||||
@ -228,6 +228,7 @@ pub fn ldl(device: &mut device::Device, opcode: u32) {
|
||||
let addr = device.cpu.gpr[rs(opcode) as usize].wrapping_add(se16(imm(opcode) as i16));
|
||||
let n = addr & 7;
|
||||
let shift = 8 * n;
|
||||
|
||||
let mask = bits_below_mask(8 * n);
|
||||
|
||||
let (mut phys_address, cached, err) =
|
||||
@ -258,12 +259,12 @@ pub fn ldr(device: &mut device::Device, opcode: u32) {
|
||||
let addr = device.cpu.gpr[rs(opcode) as usize].wrapping_add(se16(imm(opcode) as i16));
|
||||
let n = addr & 7;
|
||||
let shift = 8 * (7 - n);
|
||||
let mask;
|
||||
if n == 7 {
|
||||
mask = 0
|
||||
|
||||
let mask = if n == 7 {
|
||||
0
|
||||
} else {
|
||||
mask = bits_above_mask(8 * (n + 1))
|
||||
}
|
||||
bits_above_mask(8 * (n + 1))
|
||||
};
|
||||
|
||||
let (mut phys_address, cached, err) =
|
||||
device::memory::translate_address(device, addr, device::memory::AccessType::Read);
|
||||
@ -333,6 +334,7 @@ pub fn lwl(device: &mut device::Device, opcode: u32) {
|
||||
let addr = device.cpu.gpr[rs(opcode) as usize].wrapping_add(se16(imm(opcode) as i16));
|
||||
let n = addr & 3;
|
||||
let shift = 8 * n;
|
||||
|
||||
let mask = bits_below_mask(8 * n) as u32;
|
||||
|
||||
let (mut phys_address, cached, err) =
|
||||
@ -413,12 +415,12 @@ pub fn lwr(device: &mut device::Device, opcode: u32) {
|
||||
let addr = device.cpu.gpr[rs(opcode) as usize].wrapping_add(se16(imm(opcode) as i16));
|
||||
let n = addr & 3;
|
||||
let shift = 8 * (3 - n);
|
||||
let mask;
|
||||
if n == 3 {
|
||||
mask = 0
|
||||
|
||||
let mask = if n == 3 {
|
||||
0
|
||||
} else {
|
||||
mask = bits_above_mask(8 * (n + 1))
|
||||
}
|
||||
bits_above_mask(8 * (n + 1))
|
||||
};
|
||||
|
||||
let (mut phys_address, cached, err) =
|
||||
device::memory::translate_address(device, addr, device::memory::AccessType::Read);
|
||||
@ -503,12 +505,11 @@ pub fn swl(device: &mut device::Device, opcode: u32) {
|
||||
let n = addr & 3;
|
||||
let shift = 8 * n;
|
||||
|
||||
let mask;
|
||||
if n == 0 {
|
||||
mask = u32::MAX
|
||||
let mask = if n == 0 {
|
||||
u32::MAX
|
||||
} else {
|
||||
mask = bits_below_mask(8 * (4 - n)) as u32
|
||||
}
|
||||
bits_below_mask(8 * (4 - n)) as u32
|
||||
};
|
||||
|
||||
let (mut phys_address, cached, err) =
|
||||
device::memory::translate_address(device, addr, device::memory::AccessType::Write);
|
||||
@ -550,12 +551,11 @@ pub fn sdl(device: &mut device::Device, opcode: u32) {
|
||||
let n = addr & 7;
|
||||
let shift = 8 * n;
|
||||
|
||||
let mask;
|
||||
if n == 0 {
|
||||
mask = u64::MAX
|
||||
let mask = if n == 0 {
|
||||
u64::MAX
|
||||
} else {
|
||||
mask = bits_below_mask(8 * (8 - n))
|
||||
}
|
||||
bits_below_mask(8 * (8 - n))
|
||||
};
|
||||
|
||||
let (mut phys_address, cached, err) =
|
||||
device::memory::translate_address(device, addr, device::memory::AccessType::Write);
|
||||
@ -758,10 +758,10 @@ pub fn cache(device: &mut device::Device, opcode: u32) {
|
||||
}
|
||||
0x19 => {
|
||||
//dcache hit write back
|
||||
if device::cache::dcache_hit(device, dcache_line, phys_address) {
|
||||
if device.memory.dcache[dcache_line].dirty {
|
||||
device::cache::dcache_writeback(device, dcache_line)
|
||||
}
|
||||
if device::cache::dcache_hit(device, dcache_line, phys_address)
|
||||
&& device.memory.dcache[dcache_line].dirty
|
||||
{
|
||||
device::cache::dcache_writeback(device, dcache_line)
|
||||
}
|
||||
}
|
||||
_ => {
|
||||
|
||||
@ -30,7 +30,7 @@ pub fn create_event(
|
||||
device.cpu.events[name as usize] = Event {
|
||||
enabled: true,
|
||||
count: when,
|
||||
handler: handler,
|
||||
handler,
|
||||
};
|
||||
set_next_event(device);
|
||||
}
|
||||
@ -39,7 +39,7 @@ pub fn get_event(device: &mut device::Device, name: EventType) -> Option<&mut Ev
|
||||
if device.cpu.events[name as usize].enabled {
|
||||
return Some(&mut device.cpu.events[name as usize]);
|
||||
}
|
||||
return None;
|
||||
None
|
||||
}
|
||||
|
||||
pub fn remove_event(device: &mut device::Device, name: EventType) {
|
||||
|
||||
@ -1,15 +1,15 @@
|
||||
use crate::device;
|
||||
|
||||
pub fn fs(opcode: u32) -> u32 {
|
||||
return (opcode >> 11) & 0x1F;
|
||||
(opcode >> 11) & 0x1F
|
||||
}
|
||||
|
||||
pub fn ft(opcode: u32) -> u32 {
|
||||
return (opcode >> 16) & 0x1F;
|
||||
(opcode >> 16) & 0x1F
|
||||
}
|
||||
|
||||
pub fn fd(opcode: u32) -> u32 {
|
||||
return (opcode >> 6) & 0x1F;
|
||||
(opcode >> 6) & 0x1F
|
||||
}
|
||||
|
||||
pub fn bc1f(device: &mut device::Device, opcode: u32) {
|
||||
|
||||
@ -8,11 +8,11 @@ pub fn read_mem(
|
||||
_access_size: device::memory::AccessSize,
|
||||
) -> u32 {
|
||||
let masked_address = address as usize & IS_VIEWER_MASK;
|
||||
return u32::from_be_bytes(
|
||||
u32::from_be_bytes(
|
||||
device.cart.is_viewer_buffer[masked_address..masked_address + 4]
|
||||
.try_into()
|
||||
.unwrap(),
|
||||
);
|
||||
)
|
||||
}
|
||||
|
||||
pub fn write_mem(device: &mut device::Device, address: u64, value: u32, mask: u32) {
|
||||
@ -20,7 +20,7 @@ pub fn write_mem(device: &mut device::Device, address: u64, value: u32, mask: u3
|
||||
if masked_address == 0x14 {
|
||||
let length = (value & mask) as u64;
|
||||
let data = std::str::from_utf8(
|
||||
&device.cart.is_viewer_buffer[0x20 as usize..(0x20 + length) as usize],
|
||||
&device.cart.is_viewer_buffer[0x20_usize..(0x20 + length) as usize],
|
||||
)
|
||||
.unwrap();
|
||||
print!("{}", data);
|
||||
|
||||
@ -17,7 +17,7 @@ pub const MM_SI_REGS: usize = 0x04800000;
|
||||
pub const MM_DOM2_ADDR2: usize = 0x08000000;
|
||||
pub const MM_CART_ROM: usize = 0x10000000;
|
||||
pub const MM_PIF_MEM: usize = 0x1fc00000;
|
||||
pub const MM_DOM1_ADDR3: usize = 0x1fd00000;
|
||||
//pub const MM_DOM1_ADDR3: usize = 0x1fd00000;
|
||||
pub const MM_IS_VIEWER: usize = 0x13ff0000;
|
||||
|
||||
#[derive(PartialEq)]
|
||||
@ -62,7 +62,7 @@ pub fn translate_address(
|
||||
} else if address & 0x20000000 == 0 {
|
||||
cached = true;
|
||||
}
|
||||
return (address & 0x1FFFFFFF, cached, false);
|
||||
(address & 0x1FFFFFFF, cached, false)
|
||||
}
|
||||
|
||||
pub fn data_read(
|
||||
@ -74,11 +74,11 @@ pub fn data_read(
|
||||
if cached {
|
||||
device::cache::dcache_read(device, phys_address)
|
||||
} else {
|
||||
return device.memory.memory_map_read[(phys_address >> 16) as usize](
|
||||
device.memory.memory_map_read[(phys_address >> 16) as usize](
|
||||
device,
|
||||
phys_address,
|
||||
access_size,
|
||||
);
|
||||
)
|
||||
}
|
||||
}
|
||||
|
||||
@ -103,14 +103,14 @@ pub fn data_write(
|
||||
|
||||
pub fn init(device: &mut device::Device) {
|
||||
for i in 0..0x2000 {
|
||||
if i >= MM_RDRAM_DRAM >> 16 && i <= (MM_RDRAM_DRAM + 0x03EFFFFF) >> 16 {
|
||||
if (MM_RDRAM_DRAM >> 16..=(MM_RDRAM_DRAM + 0x03EFFFFF) >> 16).contains(&i) {
|
||||
device.memory.fast_read[i] = device::rdram::read_mem_fast;
|
||||
device.memory.memory_map_read[i] = device::rdram::read_mem;
|
||||
device.memory.memory_map_write[i] = device::rdram::write_mem;
|
||||
} else if i >= MM_RDRAM_REGS >> 16 && i <= (MM_RDRAM_REGS + 0xFFFFF) >> 16 {
|
||||
} else if (MM_RDRAM_REGS >> 16..=(MM_RDRAM_REGS + 0xFFFFF) >> 16).contains(&i) {
|
||||
device.memory.memory_map_read[i] = device::rdram::read_regs;
|
||||
device.memory.memory_map_write[i] = device::rdram::write_regs;
|
||||
} else if i >= MM_RSP_MEM >> 16 && i <= (MM_RSP_MEM + 0x3FFFF) >> 16 {
|
||||
} else if (MM_RSP_MEM >> 16..=(MM_RSP_MEM + 0x3FFFF) >> 16).contains(&i) {
|
||||
device.memory.fast_read[i] = device::rsp_interface::read_mem_fast;
|
||||
device.memory.memory_map_read[i] = device::rsp_interface::read_mem;
|
||||
device.memory.memory_map_write[i] = device::rsp_interface::write_mem;
|
||||
@ -144,7 +144,7 @@ pub fn init(device: &mut device::Device) {
|
||||
} else if i >= MM_SI_REGS >> 16 && i <= (MM_SI_REGS + 0xFFFF) >> 16 {
|
||||
device.memory.memory_map_read[i] = device::si::read_regs;
|
||||
device.memory.memory_map_write[i] = device::si::write_regs;
|
||||
} else if i >= MM_DOM2_ADDR2 >> 16 && i <= (MM_DOM2_ADDR2 + 0x1FFFF) >> 16 {
|
||||
} else if (MM_DOM2_ADDR2 >> 16..=(MM_DOM2_ADDR2 + 0x1FFFF) >> 16).contains(&i) {
|
||||
device.memory.memory_map_read[i] = device::sram::read_mem;
|
||||
device.memory.memory_map_write[i] = device::sram::write_mem;
|
||||
} else if i >= MM_CART_ROM >> 16 && i <= (MM_CART_ROM + device.cart.rom.len() - 1) >> 16 {
|
||||
|
||||
@ -42,17 +42,17 @@ pub fn format_mempak(device: &mut device::Device) {
|
||||
|
||||
/* Fill INODE page 1 and update it's checkum */
|
||||
let start_page = 5;
|
||||
for i in 1 * MPK_PAGE_SIZE..2 * start_page {
|
||||
for i in MPK_PAGE_SIZE..2 * start_page {
|
||||
device.ui.saves.mempak.0[offset + i] = 0;
|
||||
}
|
||||
for i in (1 * MPK_PAGE_SIZE + 2 * start_page..2 * MPK_PAGE_SIZE).step_by(2) {
|
||||
device.ui.saves.mempak.0[offset + i + 0] = 0x00;
|
||||
for i in (MPK_PAGE_SIZE + 2 * start_page..2 * MPK_PAGE_SIZE).step_by(2) {
|
||||
device.ui.saves.mempak.0[offset + i] = 0x00;
|
||||
device.ui.saves.mempak.0[offset + i + 1] = 0x03;
|
||||
}
|
||||
device.ui.saves.mempak.0[offset + (1 * MPK_PAGE_SIZE + 1)] = 0x71;
|
||||
device.ui.saves.mempak.0[offset + (MPK_PAGE_SIZE + 1)] = 0x71;
|
||||
|
||||
/* Page 2 is identical to page 1 */
|
||||
let page1 = offset + 1 * MPK_PAGE_SIZE;
|
||||
let page1 = offset + MPK_PAGE_SIZE;
|
||||
let page2 = offset + 2 * MPK_PAGE_SIZE;
|
||||
let page1data = device.ui.saves.mempak.0[page1..page1 + MPK_PAGE_SIZE].to_vec();
|
||||
device.ui.saves.mempak.0[page2..page2 + MPK_PAGE_SIZE].copy_from_slice(&page1data);
|
||||
|
||||
@ -53,7 +53,7 @@ pub fn read_regs(
|
||||
address: u64,
|
||||
_access_size: device::memory::AccessSize,
|
||||
) -> u32 {
|
||||
return device.mi.regs[((address & 0xFFFF) >> 2) as usize];
|
||||
device.mi.regs[((address & 0xFFFF) >> 2) as usize]
|
||||
}
|
||||
|
||||
pub fn write_regs(device: &mut device::Device, address: u64, value: u32, mask: u32) {
|
||||
|
||||
@ -41,14 +41,10 @@ pub fn read_regs(
|
||||
) -> u32 {
|
||||
let reg = (address & 0xFFFF) >> 2;
|
||||
match reg as u32 {
|
||||
PI_WR_LEN_REG | PI_RD_LEN_REG => {
|
||||
return 0x7F;
|
||||
}
|
||||
PI_CART_ADDR_REG => return device.pi.regs[reg as usize] & 0xFFFFFFFE,
|
||||
PI_DRAM_ADDR_REG => return device.pi.regs[reg as usize] & 0xFFFFFE,
|
||||
_ => {
|
||||
return device.pi.regs[reg as usize];
|
||||
}
|
||||
PI_WR_LEN_REG | PI_RD_LEN_REG => 0x7F,
|
||||
PI_CART_ADDR_REG => device.pi.regs[reg as usize] & 0xFFFFFFFE,
|
||||
PI_DRAM_ADDR_REG => device.pi.regs[reg as usize] & 0xFFFFFE,
|
||||
_ => device.pi.regs[reg as usize],
|
||||
}
|
||||
}
|
||||
|
||||
@ -121,21 +117,15 @@ pub fn get_handler(address: u32) -> PiHandler {
|
||||
write: device::cart_rom::dma_write,
|
||||
};
|
||||
if address >= device::memory::MM_CART_ROM as u32 {
|
||||
if address >= device::memory::MM_DOM1_ADDR3 as u32 {
|
||||
// this should result in all 0's being read/written
|
||||
handler.read = device::cart_rom::dma_read;
|
||||
handler.write = device::cart_rom::dma_write;
|
||||
} else {
|
||||
handler.read = device::cart_rom::dma_read;
|
||||
handler.write = device::cart_rom::dma_write;
|
||||
}
|
||||
handler.read = device::cart_rom::dma_read;
|
||||
handler.write = device::cart_rom::dma_write;
|
||||
} else if address >= device::memory::MM_DOM2_ADDR2 as u32 {
|
||||
handler.read = device::sram::dma_read;
|
||||
handler.write = device::sram::dma_write;
|
||||
} else {
|
||||
panic!("unknown pi handler")
|
||||
}
|
||||
return handler;
|
||||
handler
|
||||
}
|
||||
|
||||
pub fn write_regs(device: &mut device::Device, address: u64, value: u32, mask: u32) {
|
||||
@ -166,7 +156,7 @@ pub fn write_regs(device: &mut device::Device, address: u64, value: u32, mask: u
|
||||
}
|
||||
}
|
||||
|
||||
pub fn calculate_cycles(device: &mut device::Device, domain: i32, length: u32) -> u64 {
|
||||
pub fn calculate_cycles(device: &device::Device, domain: i32, length: u32) -> u64 {
|
||||
let mut cycles: f64 = 0.0;
|
||||
let (page_size, latency, pulse_width, release, pages);
|
||||
let page_size_base: f64 = 2.0;
|
||||
@ -189,7 +179,7 @@ pub fn calculate_cycles(device: &mut device::Device, domain: i32, length: u32) -
|
||||
cycles += (14.0 + latency) * pages;
|
||||
cycles += (pulse_width + release) * (length as f64 / 2.0);
|
||||
cycles += 5.0 * pages;
|
||||
return (cycles * 1.5) as u64; // Converting RCP clock speed to CPU clock speed
|
||||
(cycles * 1.5) as u64 // Converting RCP clock speed to CPU clock speed
|
||||
}
|
||||
|
||||
pub fn dma_event(device: &mut device::Device) {
|
||||
|
||||
@ -30,23 +30,21 @@ pub fn read_mem(
|
||||
) -> u32 {
|
||||
device::cop0::add_cycles(device, 3000); //based on https://github.com/rasky/n64-systembench
|
||||
|
||||
let value;
|
||||
let mut masked_address = address as usize & PIF_MASK;
|
||||
if masked_address < PIF_RAM_OFFSET {
|
||||
value = u32::from_be_bytes(
|
||||
u32::from_be_bytes(
|
||||
device.pif.rom[masked_address..masked_address + 4]
|
||||
.try_into()
|
||||
.unwrap(),
|
||||
);
|
||||
)
|
||||
} else {
|
||||
masked_address -= PIF_RAM_OFFSET;
|
||||
value = u32::from_be_bytes(
|
||||
u32::from_be_bytes(
|
||||
device.pif.ram[masked_address..masked_address + 4]
|
||||
.try_into()
|
||||
.unwrap(),
|
||||
);
|
||||
)
|
||||
}
|
||||
return value;
|
||||
}
|
||||
|
||||
pub fn write_mem(device: &mut device::Device, address: u64, value: u32, mask: u32) {
|
||||
@ -76,7 +74,7 @@ pub fn write_mem(device: &mut device::Device, address: u64, value: u32, mask: u3
|
||||
|
||||
pub fn process_channel(device: &mut device::Device, channel: usize) -> usize {
|
||||
/* don't process channel if it has been disabled */
|
||||
if device.pif.channels[channel].tx == None {
|
||||
if device.pif.channels[channel].tx.is_none() {
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -85,7 +83,7 @@ pub fn process_channel(device: &mut device::Device, channel: usize) -> usize {
|
||||
device.pif.ram[device.pif.channels[channel].rx.unwrap()] &= 0x3f;
|
||||
|
||||
/* set NoResponse if no device is connected */
|
||||
if device.pif.channels[channel].process == None {
|
||||
if device.pif.channels[channel].process.is_none() {
|
||||
device.pif.ram[device.pif.channels[channel].rx.unwrap()] |= 0x80;
|
||||
return 0;
|
||||
}
|
||||
@ -93,7 +91,7 @@ pub fn process_channel(device: &mut device::Device, channel: usize) -> usize {
|
||||
/* do device processing */
|
||||
let process_handler = device.pif.channels[channel].process.unwrap();
|
||||
process_handler(device, channel);
|
||||
return 1;
|
||||
1
|
||||
}
|
||||
|
||||
pub fn update_pif_ram(device: &mut device::Device) -> u64 {
|
||||
@ -101,7 +99,7 @@ pub fn update_pif_ram(device: &mut device::Device) -> u64 {
|
||||
for k in 0..PIF_CHANNELS_COUNT {
|
||||
active_channels += process_channel(device, k)
|
||||
}
|
||||
return (24000 + (active_channels * 28000)) as u64;
|
||||
(24000 + (active_channels * 28000)) as u64
|
||||
}
|
||||
|
||||
pub fn disable_pif_channel(channel: &mut PifChannel) {
|
||||
@ -122,7 +120,7 @@ pub fn setup_pif_channel(device: &mut device::Device, channel: usize, buf: usize
|
||||
device.pif.channels[channel].tx_buf = Some(buf + 2);
|
||||
device.pif.channels[channel].rx_buf = Some(buf + 2 + tx as usize);
|
||||
|
||||
return (2 + tx + rx) as usize;
|
||||
(2 + tx + rx) as usize
|
||||
}
|
||||
|
||||
pub fn setup_channels_format(device: &mut device::Device) {
|
||||
|
||||
@ -52,7 +52,7 @@ pub fn read_regs_dpc(
|
||||
address: u64,
|
||||
_access_size: device::memory::AccessSize,
|
||||
) -> u32 {
|
||||
return device.rdp.regs_dpc[((address & 0xFFFF) >> 2) as usize];
|
||||
device.rdp.regs_dpc[((address & 0xFFFF) >> 2) as usize]
|
||||
}
|
||||
|
||||
pub fn write_regs_dpc(device: &mut device::Device, address: u64, value: u32, mask: u32) {
|
||||
@ -108,7 +108,7 @@ pub fn read_regs_dps(
|
||||
address: u64,
|
||||
_access_size: device::memory::AccessSize,
|
||||
) -> u32 {
|
||||
return device.rdp.regs_dps[((address & 0xFFFF) >> 2) as usize];
|
||||
device.rdp.regs_dps[((address & 0xFFFF) >> 2) as usize]
|
||||
}
|
||||
|
||||
pub fn write_regs_dps(device: &mut device::Device, address: u64, value: u32, mask: u32) {
|
||||
|
||||
@ -15,11 +15,11 @@ pub fn read_mem_fast(
|
||||
_access_size: device::memory::AccessSize,
|
||||
) -> u32 {
|
||||
let masked_address = address as usize & RDRAM_MASK;
|
||||
return u32::from_ne_bytes(
|
||||
u32::from_ne_bytes(
|
||||
device.rdram.mem[masked_address..masked_address + 4]
|
||||
.try_into()
|
||||
.unwrap(),
|
||||
);
|
||||
)
|
||||
}
|
||||
|
||||
pub fn read_mem(
|
||||
@ -33,13 +33,13 @@ pub fn read_mem(
|
||||
);
|
||||
let masked_address = address as usize & RDRAM_MASK;
|
||||
if address < RDRAM_SIZE as u64 {
|
||||
return u32::from_ne_bytes(
|
||||
u32::from_ne_bytes(
|
||||
device.rdram.mem[masked_address..masked_address + 4]
|
||||
.try_into()
|
||||
.unwrap(),
|
||||
);
|
||||
)
|
||||
} else {
|
||||
return 0;
|
||||
0
|
||||
}
|
||||
}
|
||||
|
||||
@ -78,9 +78,9 @@ pub fn init(device: &mut device::Device) -> (*mut u8, usize) {
|
||||
let data: u32 = RDRAM_SIZE as u32;
|
||||
device.rdram.mem[device.cart.rdram_size_offset..device.cart.rdram_size_offset + 4]
|
||||
.copy_from_slice(&data.to_ne_bytes());
|
||||
return (ptr, RDRAM_SIZE);
|
||||
(ptr, RDRAM_SIZE)
|
||||
}
|
||||
|
||||
pub fn rdram_calculate_cycles(length: u64) -> u64 {
|
||||
return 31 + (length / 3); // https://hcs64.com/dma.html, https://github.com/rasky/n64-systembench
|
||||
31 + (length / 3)// https://hcs64.com/dma.html, https://github.com/rasky/n64-systembench
|
||||
}
|
||||
|
||||
@ -22,7 +22,7 @@ pub fn read_regs(
|
||||
if ((address & 0xFFFF) >> 2) as u32 == RI_SELECT_REG {
|
||||
return 0x14; // hack, skip RDRAM initialization
|
||||
}
|
||||
return device.ri.regs[((address & 0xFFFF) >> 2) as usize];
|
||||
device.ri.regs[((address & 0xFFFF) >> 2) as usize]
|
||||
}
|
||||
|
||||
pub fn write_regs(device: &mut device::Device, address: u64, value: u32, mask: u32) {
|
||||
|
||||
@ -54,13 +54,13 @@ pub struct Cpu {
|
||||
pub vec_instrs: [fn(&mut device::Device, u32); 64],
|
||||
}
|
||||
|
||||
pub fn in_delay_slot(device: &mut device::Device) -> bool {
|
||||
return device.rsp.cpu.branch_state.state == device::cpu::State::DelaySlotTaken
|
||||
|| device.rsp.cpu.branch_state.state == device::cpu::State::DelaySlotNotTaken;
|
||||
pub fn in_delay_slot(device: &device::Device) -> bool {
|
||||
device.rsp.cpu.branch_state.state == device::cpu::State::DelaySlotTaken
|
||||
|| device.rsp.cpu.branch_state.state == device::cpu::State::DelaySlotNotTaken
|
||||
}
|
||||
|
||||
pub fn in_delay_slot_taken(device: &mut device::Device) -> bool {
|
||||
return device.rsp.cpu.branch_state.state == device::cpu::State::DelaySlotTaken;
|
||||
pub fn in_delay_slot_taken(device: &device::Device) -> bool {
|
||||
device.rsp.cpu.branch_state.state == device::cpu::State::DelaySlotTaken
|
||||
}
|
||||
|
||||
pub fn run(device: &mut device::Device) -> u64 {
|
||||
@ -127,36 +127,36 @@ pub fn run(device: &mut device::Device) -> u64 {
|
||||
}
|
||||
}
|
||||
}
|
||||
return (device.rsp.cpu.cycle_counter as f64 * 1.5) as u64; // converting RCP clock to CPU clock
|
||||
(device.rsp.cpu.cycle_counter as f64 * 1.5) as u64 // converting RCP clock to CPU clock
|
||||
}
|
||||
|
||||
pub fn decode_opcode(device: &mut device::Device, opcode: u32) -> fn(&mut device::Device, u32) {
|
||||
pub fn decode_opcode(device: &device::Device, opcode: u32) -> fn(&mut device::Device, u32) {
|
||||
match opcode >> 26 {
|
||||
0 => {
|
||||
// SPECIAL
|
||||
return device.rsp.cpu.special_instrs[(opcode & 0x3F) as usize];
|
||||
device.rsp.cpu.special_instrs[(opcode & 0x3F) as usize]
|
||||
}
|
||||
1 => {
|
||||
// REGIMM
|
||||
return device.rsp.cpu.regimm_instrs[((opcode >> 16) & 0x1F) as usize];
|
||||
device.rsp.cpu.regimm_instrs[((opcode >> 16) & 0x1F) as usize]
|
||||
}
|
||||
16 => {
|
||||
// COP0
|
||||
return device.rsp.cpu.cop0_instrs[((opcode >> 21) & 0x1F) as usize];
|
||||
device.rsp.cpu.cop0_instrs[((opcode >> 21) & 0x1F) as usize]
|
||||
}
|
||||
18 => {
|
||||
// COP2
|
||||
return device.rsp.cpu.cop2_instrs[((opcode >> 21) & 0x1F) as usize];
|
||||
device.rsp.cpu.cop2_instrs[((opcode >> 21) & 0x1F) as usize]
|
||||
}
|
||||
50 => {
|
||||
// LWC2
|
||||
return device.rsp.cpu.lwc2_instrs[((opcode >> 11) & 0x1F) as usize];
|
||||
device.rsp.cpu.lwc2_instrs[((opcode >> 11) & 0x1F) as usize]
|
||||
}
|
||||
58 => {
|
||||
// SWC2
|
||||
return device.rsp.cpu.swc2_instrs[((opcode >> 11) & 0x1F) as usize];
|
||||
device.rsp.cpu.swc2_instrs[((opcode >> 11) & 0x1F) as usize]
|
||||
}
|
||||
_ => return device.rsp.cpu.instrs[(opcode >> 26) as usize],
|
||||
_ => device.rsp.cpu.instrs[(opcode >> 26) as usize],
|
||||
}
|
||||
}
|
||||
|
||||
@ -165,7 +165,7 @@ pub fn init(device: &mut device::Device) {
|
||||
let mut index = 1;
|
||||
while index < 512 {
|
||||
let a = (index + 512) as u64;
|
||||
let b = ((1 as u64) << 34) / a;
|
||||
let b = (1_u64 << 34) / a;
|
||||
device.rsp.cpu.reciprocals[index] = ((b + 1) >> 8) as u16;
|
||||
index += 1;
|
||||
}
|
||||
@ -179,7 +179,7 @@ pub fn init(device: &mut device::Device) {
|
||||
let a = ((index + 512) >> shift) as u64;
|
||||
let mut b = (1 << 17) as u64;
|
||||
//find the largest b where b < 1.0 / sqrt(a)
|
||||
while a * (b + 1) * (b + 1) < ((1 as u64) << 44) {
|
||||
while a * (b + 1) * (b + 1) < (1_u64 << 44) {
|
||||
b += 1;
|
||||
}
|
||||
device.rsp.cpu.inverse_square_roots[index] = (b >> 1) as u16;
|
||||
|
||||
@ -89,11 +89,11 @@ pub fn read_mem_fast(
|
||||
_access_size: device::memory::AccessSize,
|
||||
) -> u32 {
|
||||
let masked_address = address as usize & RSP_MEM_MASK;
|
||||
return u32::from_be_bytes(
|
||||
u32::from_be_bytes(
|
||||
device.rsp.mem[masked_address..masked_address + 4]
|
||||
.try_into()
|
||||
.unwrap(),
|
||||
);
|
||||
)
|
||||
}
|
||||
|
||||
pub fn read_mem(
|
||||
@ -102,11 +102,11 @@ pub fn read_mem(
|
||||
_access_size: device::memory::AccessSize,
|
||||
) -> u32 {
|
||||
let masked_address = address as usize & RSP_MEM_MASK;
|
||||
return u32::from_be_bytes(
|
||||
u32::from_be_bytes(
|
||||
device.rsp.mem[masked_address..masked_address + 4]
|
||||
.try_into()
|
||||
.unwrap(),
|
||||
);
|
||||
)
|
||||
}
|
||||
|
||||
pub fn write_mem(device: &mut device::Device, address: u64, value: u32, _mask: u32) {
|
||||
@ -121,9 +121,9 @@ pub fn write_mem(device: &mut device::Device, address: u64, value: u32, _mask: u
|
||||
|
||||
if masked_address & 0x1000 != 0 {
|
||||
// imem being updated
|
||||
device.rsp.cpu.instructions[((masked_address & 0xFFF) / 4) as usize].func =
|
||||
device.rsp.cpu.instructions[(masked_address & 0xFFF) / 4].func =
|
||||
device::rsp_cpu::decode_opcode(device, data);
|
||||
device.rsp.cpu.instructions[((masked_address & 0xFFF) / 4) as usize].opcode = data;
|
||||
device.rsp.cpu.instructions[(masked_address & 0xFFF) / 4].opcode = data;
|
||||
}
|
||||
|
||||
// SH/SB are broken: They overwrite the whole 32 bit, filling everything that isn't written with zeroes
|
||||
@ -260,9 +260,9 @@ pub fn read_regs(
|
||||
SP_SEMAPHORE_REG => {
|
||||
let value = device.rsp.regs[reg as usize];
|
||||
device.rsp.regs[reg as usize] = 1;
|
||||
return value;
|
||||
value
|
||||
}
|
||||
_ => return device.rsp.regs[reg as usize],
|
||||
_ => device.rsp.regs[reg as usize],
|
||||
}
|
||||
}
|
||||
|
||||
@ -292,7 +292,7 @@ pub fn read_regs2(
|
||||
address: u64,
|
||||
_access_size: device::memory::AccessSize,
|
||||
) -> u32 {
|
||||
return device.rsp.regs2[((address & 0xFFFF) >> 2) as usize];
|
||||
device.rsp.regs2[((address & 0xFFFF) >> 2) as usize]
|
||||
}
|
||||
|
||||
pub fn write_regs2(device: &mut device::Device, address: u64, value: u32, mask: u32) {
|
||||
|
||||
@ -2,41 +2,41 @@ use crate::device;
|
||||
use std::arch::x86_64::*;
|
||||
|
||||
pub fn rd(opcode: u32) -> u32 {
|
||||
return (opcode >> 11) & 0x1F;
|
||||
(opcode >> 11) & 0x1F
|
||||
}
|
||||
|
||||
pub fn rs(opcode: u32) -> u32 {
|
||||
return (opcode >> 21) & 0x1F;
|
||||
(opcode >> 21) & 0x1F
|
||||
}
|
||||
|
||||
pub fn rt(opcode: u32) -> u32 {
|
||||
return (opcode >> 16) & 0x1F;
|
||||
(opcode >> 16) & 0x1F
|
||||
}
|
||||
|
||||
pub fn sa(opcode: u32) -> u32 {
|
||||
return (opcode >> 6) & 0x1F;
|
||||
(opcode >> 6) & 0x1F
|
||||
}
|
||||
|
||||
pub fn imm(opcode: u32) -> u16 {
|
||||
return opcode as u16;
|
||||
opcode as u16
|
||||
}
|
||||
|
||||
pub fn se16(value: i16) -> u32 {
|
||||
return value as i32 as u32;
|
||||
value as i32 as u32
|
||||
}
|
||||
|
||||
pub fn voffset(opcode: u32) -> u8 {
|
||||
return (opcode & 0x7F) as u8;
|
||||
(opcode & 0x7F) as u8
|
||||
}
|
||||
|
||||
pub fn velement(opcode: u32) -> u8 {
|
||||
return ((opcode >> 7) & 0xF) as u8;
|
||||
((opcode >> 7) & 0xF) as u8
|
||||
}
|
||||
|
||||
pub fn sign_extend_7bit_offset(offset: u8, shift_amount: u32) -> u32 {
|
||||
let soffset = (((offset << 1) & 0x80) | offset) as i8;
|
||||
|
||||
return (((soffset) as i32) as u32) << shift_amount;
|
||||
(((soffset) as i32) as u32) << shift_amount
|
||||
}
|
||||
|
||||
pub fn modify_vpr_byte(vpr: &mut u128, value: u8, element: u8) {
|
||||
@ -48,7 +48,7 @@ pub fn modify_vpr_byte(vpr: &mut u128, value: u8, element: u8) {
|
||||
|
||||
pub fn get_vpr_byte(vpr: u128, element: u8) -> u8 {
|
||||
let pos = 15 - (element & 15);
|
||||
return (vpr >> (pos * 8)) as u8;
|
||||
(vpr >> (pos * 8)) as u8
|
||||
}
|
||||
|
||||
pub fn modify_vpr_element(vpr: &mut u128, value: u16, element: u8) {
|
||||
@ -60,7 +60,7 @@ pub fn modify_vpr_element(vpr: &mut u128, value: u16, element: u8) {
|
||||
|
||||
pub fn get_vpr_element(vpr: u128, element: u8) -> u16 {
|
||||
let pos = 7 - (element & 7);
|
||||
return (vpr >> (pos * 16)) as u16;
|
||||
(vpr >> (pos * 16)) as u16
|
||||
}
|
||||
|
||||
pub fn j(device: &mut device::Device, opcode: u32) {
|
||||
@ -70,7 +70,7 @@ pub fn j(device: &mut device::Device, opcode: u32) {
|
||||
device.rsp.cpu.branch_state.state = device::cpu::State::Take;
|
||||
device.rsp.cpu.branch_state.pc =
|
||||
(device.rsp.regs2[device::rsp_interface::SP_PC_REG as usize] + 4) & 0xF0000000
|
||||
| ((opcode & 0x3FFFFFF) << 2) as u32
|
||||
| ((opcode & 0x3FFFFFF) << 2)
|
||||
}
|
||||
|
||||
pub fn jal(device: &mut device::Device, opcode: u32) {
|
||||
@ -84,7 +84,7 @@ pub fn jal(device: &mut device::Device, opcode: u32) {
|
||||
device.rsp.cpu.branch_state.state = device::cpu::State::Take;
|
||||
device.rsp.cpu.branch_state.pc =
|
||||
(device.rsp.regs2[device::rsp_interface::SP_PC_REG as usize] + 4) & 0xF0000000
|
||||
| ((opcode & 0x3FFFFFF) << 2) as u32
|
||||
| ((opcode & 0x3FFFFFF) << 2)
|
||||
} else if !device::rsp_cpu::in_delay_slot(device) {
|
||||
device.rsp.cpu.branch_state.state = device::cpu::State::NotTaken;
|
||||
}
|
||||
@ -191,7 +191,7 @@ pub fn lh(device: &mut device::Device, opcode: u32) {
|
||||
|
||||
let mut w = [0; 2];
|
||||
w[0] = device.rsp.mem[address as usize & 0xFFF];
|
||||
w[1] = device.rsp.mem[(address as usize + 1) & &0xFFF];
|
||||
w[1] = device.rsp.mem[(address as usize + 1) & 0xFFF];
|
||||
|
||||
device.rsp.cpu.gpr[rt(opcode) as usize] =
|
||||
(((w[0] as u16) << 8) | w[1] as u16) as i16 as i32 as u32
|
||||
@ -203,9 +203,9 @@ pub fn lw(device: &mut device::Device, opcode: u32) {
|
||||
|
||||
let mut w = [0; 4];
|
||||
w[0] = device.rsp.mem[address as usize & 0xFFF];
|
||||
w[1] = device.rsp.mem[(address as usize + 1) & &0xFFF];
|
||||
w[2] = device.rsp.mem[(address as usize + 2) & &0xFFF];
|
||||
w[3] = device.rsp.mem[(address as usize + 3) & &0xFFF];
|
||||
w[1] = device.rsp.mem[(address as usize + 1) & 0xFFF];
|
||||
w[2] = device.rsp.mem[(address as usize + 2) & 0xFFF];
|
||||
w[3] = device.rsp.mem[(address as usize + 3) & 0xFFF];
|
||||
|
||||
device.rsp.cpu.gpr[rt(opcode) as usize] =
|
||||
(w[0] as u32) << 24 | (w[1] as u32) << 16 | (w[2] as u32) << 8 | (w[3] as u32)
|
||||
@ -224,7 +224,7 @@ pub fn lhu(device: &mut device::Device, opcode: u32) {
|
||||
|
||||
let mut w = [0; 2];
|
||||
w[0] = device.rsp.mem[address as usize & 0xFFF];
|
||||
w[1] = device.rsp.mem[(address as usize + 1) & &0xFFF];
|
||||
w[1] = device.rsp.mem[(address as usize + 1) & 0xFFF];
|
||||
|
||||
device.rsp.cpu.gpr[rt(opcode) as usize] = (((w[0] as u16) << 8) | w[1] as u16) as u32
|
||||
}
|
||||
@ -235,9 +235,9 @@ pub fn lwu(device: &mut device::Device, opcode: u32) {
|
||||
|
||||
let mut w = [0; 4];
|
||||
w[0] = device.rsp.mem[address as usize & 0xFFF];
|
||||
w[1] = device.rsp.mem[(address as usize + 1) & &0xFFF];
|
||||
w[2] = device.rsp.mem[(address as usize + 2) & &0xFFF];
|
||||
w[3] = device.rsp.mem[(address as usize + 3) & &0xFFF];
|
||||
w[1] = device.rsp.mem[(address as usize + 1) & 0xFFF];
|
||||
w[2] = device.rsp.mem[(address as usize + 2) & 0xFFF];
|
||||
w[3] = device.rsp.mem[(address as usize + 3) & 0xFFF];
|
||||
|
||||
device.rsp.cpu.gpr[rt(opcode) as usize] =
|
||||
(w[0] as u32) << 24 | (w[1] as u32) << 16 | (w[2] as u32) << 8 | (w[3] as u32)
|
||||
@ -274,13 +274,11 @@ pub fn sw(device: &mut device::Device, opcode: u32) {
|
||||
}
|
||||
|
||||
pub fn sll(device: &mut device::Device, opcode: u32) {
|
||||
device.rsp.cpu.gpr[rd(opcode) as usize] =
|
||||
(device.rsp.cpu.gpr[rt(opcode) as usize] as u32) << sa(opcode)
|
||||
device.rsp.cpu.gpr[rd(opcode) as usize] = device.rsp.cpu.gpr[rt(opcode) as usize] << sa(opcode)
|
||||
}
|
||||
|
||||
pub fn srl(device: &mut device::Device, opcode: u32) {
|
||||
device.rsp.cpu.gpr[rd(opcode) as usize] =
|
||||
(device.rsp.cpu.gpr[rt(opcode) as usize] as u32) >> sa(opcode)
|
||||
device.rsp.cpu.gpr[rd(opcode) as usize] = device.rsp.cpu.gpr[rt(opcode) as usize] >> sa(opcode)
|
||||
}
|
||||
|
||||
pub fn sra(device: &mut device::Device, opcode: u32) {
|
||||
@ -951,37 +949,22 @@ pub fn sfv(device: &mut device::Device, opcode: u32) {
|
||||
let base = address & 7;
|
||||
address &= !7;
|
||||
let element = velement(opcode);
|
||||
let elements;
|
||||
match element {
|
||||
0 | 15 => {
|
||||
elements = [0, 1, 2, 3];
|
||||
}
|
||||
1 => {
|
||||
elements = [6, 7, 4, 5];
|
||||
}
|
||||
4 => {
|
||||
elements = [1, 2, 3, 0];
|
||||
}
|
||||
5 => {
|
||||
elements = [7, 4, 5, 6];
|
||||
}
|
||||
8 => {
|
||||
elements = [4, 5, 6, 7];
|
||||
}
|
||||
11 => {
|
||||
elements = [3, 0, 1, 2];
|
||||
}
|
||||
12 => {
|
||||
elements = [5, 6, 7, 4];
|
||||
}
|
||||
let elements = match element {
|
||||
0 | 15 => [0, 1, 2, 3],
|
||||
1 => [6, 7, 4, 5],
|
||||
4 => [1, 2, 3, 0],
|
||||
5 => [7, 4, 5, 6],
|
||||
8 => [4, 5, 6, 7],
|
||||
11 => [3, 0, 1, 2],
|
||||
12 => [5, 6, 7, 4],
|
||||
_ => {
|
||||
device.rsp.mem[((address + ((base + 0) & 15)) & 0xFFF) as usize] = 0;
|
||||
device.rsp.mem[((address + (base & 15)) & 0xFFF) as usize] = 0;
|
||||
device.rsp.mem[((address + ((base + 4) & 15)) & 0xFFF) as usize] = 0;
|
||||
device.rsp.mem[((address + ((base + 8) & 15)) & 0xFFF) as usize] = 0;
|
||||
device.rsp.mem[((address + ((base + 12) & 15)) & 0xFFF) as usize] = 0;
|
||||
return;
|
||||
}
|
||||
}
|
||||
};
|
||||
let mut offset = 0;
|
||||
let mut i = 0;
|
||||
while i < 4 {
|
||||
|
||||
@ -2,23 +2,23 @@ use crate::device;
|
||||
use std::arch::x86_64::*;
|
||||
|
||||
pub fn vt(opcode: u32) -> u32 {
|
||||
return (opcode >> 16) & 0x1F;
|
||||
(opcode >> 16) & 0x1F
|
||||
}
|
||||
|
||||
pub fn ve(opcode: u32) -> u32 {
|
||||
return (opcode >> 21) & 0xF;
|
||||
(opcode >> 21) & 0xF
|
||||
}
|
||||
|
||||
pub fn vs(opcode: u32) -> u32 {
|
||||
return (opcode >> 11) & 0x1F;
|
||||
(opcode >> 11) & 0x1F
|
||||
}
|
||||
|
||||
pub fn vd(opcode: u32) -> u32 {
|
||||
return (opcode >> 6) & 0x1F;
|
||||
(opcode >> 6) & 0x1F
|
||||
}
|
||||
|
||||
pub fn de(opcode: u32) -> u32 {
|
||||
return (opcode >> 11) & 0x7;
|
||||
(opcode >> 11) & 0x7
|
||||
}
|
||||
|
||||
pub fn clamp_signed_32(value: i32) -> i16 {
|
||||
@ -28,7 +28,7 @@ pub fn clamp_signed_32(value: i32) -> i16 {
|
||||
if value > 32767 {
|
||||
return 32767;
|
||||
}
|
||||
return value as i16;
|
||||
value as i16
|
||||
}
|
||||
|
||||
pub fn clamp_signed_64(value: i64) -> i16 {
|
||||
@ -38,7 +38,7 @@ pub fn clamp_signed_64(value: i64) -> i16 {
|
||||
if value > 32767 {
|
||||
return 32767;
|
||||
}
|
||||
return value as i16;
|
||||
value as i16
|
||||
}
|
||||
|
||||
pub fn count_leading_zeros(value: u32) -> u32 {
|
||||
@ -49,13 +49,13 @@ pub fn count_leading_zeros(value: u32) -> u32 {
|
||||
}
|
||||
index -= 1;
|
||||
}
|
||||
return (31 - index) as u32;
|
||||
(31 - index) as u32
|
||||
}
|
||||
|
||||
pub fn s_clip(x: i64, bits: u32) -> i64 {
|
||||
let b = (1 as u64) << (bits - 1);
|
||||
let b = 1_u64 << (bits - 1);
|
||||
let m = b * 2 - 1;
|
||||
return ((((x as u64) & m) ^ b).wrapping_sub(b)) as i64;
|
||||
((((x as u64) & m) ^ b).wrapping_sub(b)) as i64
|
||||
}
|
||||
|
||||
pub fn modify_vpr_element(vpr: &mut u128, value: u16, element: u8) {
|
||||
@ -67,15 +67,15 @@ pub fn modify_vpr_element(vpr: &mut u128, value: u16, element: u8) {
|
||||
|
||||
pub fn get_vpr_element(vpr: u128, element: u8) -> u16 {
|
||||
let pos = 7 - (element & 7);
|
||||
return (vpr >> (pos * 16)) as u16;
|
||||
(vpr >> (pos * 16)) as u16
|
||||
}
|
||||
|
||||
pub fn vte(device: &mut device::Device, vt: u32, index: usize) -> __m128i {
|
||||
pub fn vte(device: &device::Device, vt: u32, index: usize) -> __m128i {
|
||||
unsafe {
|
||||
return _mm_shuffle_epi8(
|
||||
_mm_shuffle_epi8(
|
||||
std::mem::transmute(device.rsp.cpu.vpr[vt as usize]),
|
||||
device.rsp.cpu.shuffle[index],
|
||||
);
|
||||
)
|
||||
}
|
||||
}
|
||||
|
||||
@ -1057,15 +1057,13 @@ pub fn vrcp(device: &mut device::Device, opcode: u32) {
|
||||
pub fn vrcpl(device: &mut device::Device, opcode: u32) {
|
||||
let mut result;
|
||||
let vte = vte(device, vt(opcode), ve(opcode) as usize);
|
||||
let input;
|
||||
if device.rsp.cpu.divdp {
|
||||
input = (device.rsp.cpu.divin as i32) << 16
|
||||
let input = if device.rsp.cpu.divdp {
|
||||
(device.rsp.cpu.divin as i32) << 16
|
||||
| get_vpr_element(device.rsp.cpu.vpr[vt(opcode) as usize], ve(opcode) as u8) as u16
|
||||
as i32
|
||||
} else {
|
||||
input = get_vpr_element(device.rsp.cpu.vpr[vt(opcode) as usize], ve(opcode) as u8) as i16
|
||||
as i32;
|
||||
}
|
||||
get_vpr_element(device.rsp.cpu.vpr[vt(opcode) as usize], ve(opcode) as u8) as i16 as i32
|
||||
};
|
||||
let mask = input >> 31;
|
||||
let mut data = input ^ mask;
|
||||
if input > -32768 {
|
||||
@ -1152,15 +1150,13 @@ pub fn vrsq(device: &mut device::Device, opcode: u32) {
|
||||
pub fn vrsql(device: &mut device::Device, opcode: u32) {
|
||||
let mut result;
|
||||
let vte = vte(device, vt(opcode), ve(opcode) as usize);
|
||||
let input;
|
||||
if device.rsp.cpu.divdp {
|
||||
input = (device.rsp.cpu.divin as i32) << 16
|
||||
let input = if device.rsp.cpu.divdp {
|
||||
(device.rsp.cpu.divin as i32) << 16
|
||||
| get_vpr_element(device.rsp.cpu.vpr[vt(opcode) as usize], ve(opcode) as u8) as u16
|
||||
as i32;
|
||||
as i32
|
||||
} else {
|
||||
input = get_vpr_element(device.rsp.cpu.vpr[vt(opcode) as usize], ve(opcode) as u8) as i16
|
||||
as i32;
|
||||
}
|
||||
get_vpr_element(device.rsp.cpu.vpr[vt(opcode) as usize], ve(opcode) as u8) as i16 as i32
|
||||
};
|
||||
let mask = input >> 31;
|
||||
let mut data = input ^ mask;
|
||||
if input > -32768 {
|
||||
|
||||
@ -31,7 +31,7 @@ pub fn read_regs(
|
||||
address: u64,
|
||||
_access_size: device::memory::AccessSize,
|
||||
) -> u32 {
|
||||
return device.si.regs[((address & 0xFFFF) >> 2) as usize];
|
||||
device.si.regs[((address & 0xFFFF) >> 2) as usize]
|
||||
}
|
||||
|
||||
pub fn dma_read(device: &mut device::Device) {
|
||||
|
||||
@ -44,17 +44,17 @@ pub fn read_mem_sram(device: &mut device::Device, address: u64) -> u32 {
|
||||
|
||||
format_sram(device);
|
||||
|
||||
return u32::from_be_bytes(
|
||||
u32::from_be_bytes(
|
||||
device.ui.saves.sram.0[masked_address..masked_address + 4]
|
||||
.try_into()
|
||||
.unwrap(),
|
||||
);
|
||||
)
|
||||
}
|
||||
|
||||
pub fn read_mem_flash(device: &mut device::Device, address: u64) -> u32 {
|
||||
pub fn read_mem_flash(device: &device::Device, address: u64) -> u32 {
|
||||
if (address & 0x1ffff) == 0x00000 && device.flashram.mode == FlashramMode::Status {
|
||||
/* read Status register */
|
||||
return device.flashram.status;
|
||||
device.flashram.status
|
||||
} else if (address & 0x1ffff) == 0x0000 && device.flashram.mode == FlashramMode::ReadArray {
|
||||
/* flashram MMIO read are not supported except for the "dummy" read @0x0000 done before DMA.
|
||||
* returns a "dummy" value. */
|
||||
@ -74,9 +74,9 @@ pub fn read_mem(
|
||||
device::cop0::add_cycles(device, cycles);
|
||||
|
||||
if device.ui.save_type.contains(&ui::storage::SaveTypes::Sram) {
|
||||
return read_mem_sram(device, address);
|
||||
read_mem_sram(device, address)
|
||||
} else {
|
||||
return read_mem_flash(device, address);
|
||||
read_mem_flash(device, address)
|
||||
}
|
||||
}
|
||||
|
||||
@ -175,7 +175,7 @@ pub fn dma_read(device: &mut device::Device, cart_addr: u32, dram_addr: u32, len
|
||||
} else {
|
||||
dma_read_flash(device, cart_addr, dram_addr, length)
|
||||
}
|
||||
return device::pi::calculate_cycles(device, 2, length);
|
||||
device::pi::calculate_cycles(device, 2, length)
|
||||
}
|
||||
|
||||
pub fn dma_write_sram(
|
||||
@ -248,7 +248,7 @@ pub fn dma_write(device: &mut device::Device, cart_addr: u32, dram_addr: u32, le
|
||||
} else {
|
||||
dma_write_flash(device, cart_addr, dram_addr, length)
|
||||
}
|
||||
return device::pi::calculate_cycles(device, 2, length);
|
||||
device::pi::calculate_cycles(device, 2, length)
|
||||
}
|
||||
|
||||
pub fn flashram_command(device: &mut device::Device, command: u32) {
|
||||
@ -272,7 +272,7 @@ pub fn flashram_command(device: &mut device::Device, command: u32) {
|
||||
if device.flashram.mode == FlashramMode::SectorErase {
|
||||
let offset: usize = (device.flashram.erase_page & 0xff80) as usize * 128;
|
||||
for i in 0..128 * 128 {
|
||||
device.ui.saves.flash.0[offset as usize + i] = 0xFF;
|
||||
device.ui.saves.flash.0[offset + i] = 0xFF;
|
||||
}
|
||||
device.ui.saves.flash.1 = true
|
||||
} else if device.flashram.mode == FlashramMode::ChipErase {
|
||||
@ -297,8 +297,7 @@ pub fn flashram_command(device: &mut device::Device, command: u32) {
|
||||
/* program selected page */
|
||||
let offset: usize = (command & 0xffff) as usize * 128;
|
||||
for i in 0..128 {
|
||||
device.ui.saves.flash.0[(offset + i) as usize] =
|
||||
device.flashram.page_buf[i as usize];
|
||||
device.ui.saves.flash.0[offset + i] = device.flashram.page_buf[i];
|
||||
}
|
||||
device.ui.saves.flash.1 = true;
|
||||
|
||||
|
||||
@ -35,7 +35,7 @@ pub fn read(device: &mut device::Device, index: u64) {
|
||||
return;
|
||||
}
|
||||
device.cpu.cop0.regs[device::cop0::COP0_PAGEMASK_REG as usize] =
|
||||
(device.cpu.cop0.tlb_entries[index as usize].mask << 13) as u64;
|
||||
device.cpu.cop0.tlb_entries[index as usize].mask << 13;
|
||||
|
||||
device.cpu.cop0.regs[device::cop0::COP0_ENTRYHI_REG as usize] =
|
||||
(device.cpu.cop0.tlb_entries[index as usize].region as u64) << 62
|
||||
@ -136,10 +136,8 @@ pub fn probe(device: &mut device::Device) {
|
||||
if e.region != (device.cpu.cop0.regs[device::cop0::COP0_ENTRYHI_REG as usize] >> 62) as u8 {
|
||||
continue;
|
||||
}
|
||||
if e.g == 0 {
|
||||
if e.asid != device.cpu.cop0.regs[device::cop0::COP0_ENTRYHI_REG as usize] as u8 {
|
||||
continue;
|
||||
}
|
||||
if e.g == 0 && e.asid != device.cpu.cop0.regs[device::cop0::COP0_ENTRYHI_REG as usize] as u8 {
|
||||
continue;
|
||||
}
|
||||
device.cpu.cop0.regs[device::cop0::COP0_INDEX_REG as usize] = pos as u64;
|
||||
break;
|
||||
@ -187,51 +185,43 @@ pub fn tlb_unmap(device: &mut device::Device, index: u64) {
|
||||
pub fn tlb_map(device: &mut device::Device, index: u64) {
|
||||
let e = &mut device.cpu.cop0.tlb_entries[index as usize];
|
||||
|
||||
if e.v_even != 0 {
|
||||
if e.start_even < e.end_even
|
||||
&& !(e.start_even >= 0x80000000 && e.end_even < 0xC0000000)
|
||||
&& e.phys_even < 0x20000000
|
||||
{
|
||||
if e.v_even != 0 && e.start_even < e.end_even
|
||||
&& !(e.start_even >= 0x80000000 && e.end_even < 0xC0000000) && e.phys_even < 0x20000000 {
|
||||
let mut i = e.start_even;
|
||||
while i < e.end_even {
|
||||
device.cpu.cop0.tlb_lut_r[(i >> 12) as usize].address =
|
||||
0x80000000 | (e.phys_even + (i - e.start_even) + 0xFFF);
|
||||
device.cpu.cop0.tlb_lut_r[(i >> 12) as usize].cached = e.c_even != 2;
|
||||
i += 0x1000
|
||||
}
|
||||
if e.d_even != 0 {
|
||||
let mut i = e.start_even;
|
||||
while i < e.end_even {
|
||||
device.cpu.cop0.tlb_lut_r[(i >> 12) as usize].address =
|
||||
0x80000000 | (e.phys_even + (i - e.start_even) + 0xFFF) as u64;
|
||||
device.cpu.cop0.tlb_lut_r[(i >> 12) as usize].cached = e.c_even != 2;
|
||||
device.cpu.cop0.tlb_lut_w[(i >> 12) as usize].address =
|
||||
0x80000000 | (e.phys_even + (i - e.start_even) + 0xFFF);
|
||||
device.cpu.cop0.tlb_lut_w[(i >> 12) as usize].cached = e.c_even != 2;
|
||||
i += 0x1000
|
||||
}
|
||||
if e.d_even != 0 {
|
||||
let mut i = e.start_even;
|
||||
while i < e.end_even {
|
||||
device.cpu.cop0.tlb_lut_w[(i >> 12) as usize].address =
|
||||
0x80000000 | (e.phys_even + (i - e.start_even) + 0xFFF) as u64;
|
||||
device.cpu.cop0.tlb_lut_w[(i >> 12) as usize].cached = e.c_even != 2;
|
||||
i += 0x1000
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if e.v_odd != 0 {
|
||||
if e.start_odd < e.end_odd
|
||||
&& !(e.start_odd >= 0x80000000 && e.end_odd < 0xC0000000)
|
||||
&& e.phys_odd < 0x20000000
|
||||
{
|
||||
if e.v_odd != 0 && e.start_odd < e.end_odd
|
||||
&& !(e.start_odd >= 0x80000000 && e.end_odd < 0xC0000000) && e.phys_odd < 0x20000000 {
|
||||
let mut i = e.start_odd;
|
||||
while i < e.end_odd {
|
||||
device.cpu.cop0.tlb_lut_r[(i >> 12) as usize].address =
|
||||
0x80000000 | (e.phys_odd + (i - e.start_odd) + 0xFFF);
|
||||
device.cpu.cop0.tlb_lut_r[(i >> 12) as usize].cached = e.c_odd != 2;
|
||||
i += 0x1000
|
||||
}
|
||||
if e.d_odd != 0 {
|
||||
let mut i = e.start_odd;
|
||||
while i < e.end_odd {
|
||||
device.cpu.cop0.tlb_lut_r[(i >> 12) as usize].address =
|
||||
0x80000000 | (e.phys_odd + (i - e.start_odd) + 0xFFF) as u64;
|
||||
device.cpu.cop0.tlb_lut_r[(i >> 12) as usize].cached = e.c_odd != 2;
|
||||
device.cpu.cop0.tlb_lut_w[(i >> 12) as usize].address =
|
||||
0x80000000 | (e.phys_odd + (i - e.start_odd) + 0xFFF);
|
||||
device.cpu.cop0.tlb_lut_w[(i >> 12) as usize].cached = e.c_odd != 2;
|
||||
i += 0x1000
|
||||
}
|
||||
if e.d_odd != 0 {
|
||||
let mut i = e.start_odd;
|
||||
while i < e.end_odd {
|
||||
device.cpu.cop0.tlb_lut_w[(i >> 12) as usize].address =
|
||||
0x80000000 | (e.phys_odd + (i - e.start_odd) + 0xFFF) as u64;
|
||||
device.cpu.cop0.tlb_lut_w[(i >> 12) as usize].cached = e.c_odd != 2;
|
||||
i += 0x1000
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -252,18 +242,16 @@ pub fn get_physical_address(
|
||||
false,
|
||||
);
|
||||
}
|
||||
} else {
|
||||
if device.cpu.cop0.tlb_lut_r[(address >> 12) as usize].address != 0 {
|
||||
return (
|
||||
(device.cpu.cop0.tlb_lut_r[(address >> 12) as usize].address & 0x1FFFF000)
|
||||
| (address & 0xFFF),
|
||||
device.cpu.cop0.tlb_lut_r[(address >> 12) as usize].cached,
|
||||
false,
|
||||
);
|
||||
}
|
||||
} else if device.cpu.cop0.tlb_lut_r[(address >> 12) as usize].address != 0 {
|
||||
return (
|
||||
(device.cpu.cop0.tlb_lut_r[(address >> 12) as usize].address & 0x1FFFF000)
|
||||
| (address & 0xFFF),
|
||||
device.cpu.cop0.tlb_lut_r[(address >> 12) as usize].cached,
|
||||
false,
|
||||
);
|
||||
}
|
||||
|
||||
device::exceptions::tlb_miss_exception(device, address, access_type);
|
||||
|
||||
return (0, false, true);
|
||||
(0, false, true)
|
||||
}
|
||||
|
||||
@ -6,7 +6,7 @@ pub fn read_mem(
|
||||
_access_size: device::memory::AccessSize,
|
||||
) -> u32 {
|
||||
let value = (address & 0xFFFF) as u32;
|
||||
return value | (value << 16);
|
||||
value | (value << 16)
|
||||
}
|
||||
|
||||
pub fn write_mem(_device: &mut device::Device, _address: u64, _value: u32, _mask: u32) {}
|
||||
|
||||
@ -46,7 +46,7 @@ pub fn set_expected_refresh_rate(device: &mut device::Device) {
|
||||
}
|
||||
|
||||
pub fn set_vertical_interrupt(device: &mut device::Device) {
|
||||
if device::events::get_event(device, device::events::EventType::VI) == None {
|
||||
if device::events::get_event(device, device::events::EventType::VI).is_none() {
|
||||
device::events::create_event(
|
||||
device,
|
||||
device::events::EventType::VI,
|
||||
@ -59,7 +59,7 @@ pub fn set_vertical_interrupt(device: &mut device::Device) {
|
||||
pub fn set_current_line(device: &mut device::Device) {
|
||||
let delay = device.vi.delay;
|
||||
let next_vi = device::events::get_event(device, device::events::EventType::VI);
|
||||
if next_vi != None {
|
||||
if next_vi.is_some() {
|
||||
device.vi.regs[VI_CURRENT_REG as usize] = ((delay
|
||||
- (next_vi.unwrap().count
|
||||
- device.cpu.cop0.regs[device::cop0::COP0_COUNT_REG as usize]))
|
||||
@ -85,7 +85,7 @@ pub fn read_regs(
|
||||
if reg as u32 == VI_CURRENT_REG {
|
||||
set_current_line(device)
|
||||
}
|
||||
return device.vi.regs[reg as usize];
|
||||
device.vi.regs[reg as usize]
|
||||
}
|
||||
|
||||
pub fn write_regs(device: &mut device::Device, address: u64, value: u32, mask: u32) {
|
||||
@ -158,7 +158,7 @@ pub fn init(device: &mut device::Device) {
|
||||
*/
|
||||
}
|
||||
|
||||
pub fn speed_limiter(device: &mut device::Device) {
|
||||
pub fn speed_limiter(device: &device::Device) {
|
||||
let result = device.vi.limiter.as_ref().unwrap().check();
|
||||
if result.is_err() {
|
||||
let outcome = result.unwrap_err();
|
||||
|
||||
@ -59,7 +59,7 @@ fn swap_rom(contents: Vec<u8>) -> Vec<u8> {
|
||||
let test = u32::from_be_bytes(contents[0..4].try_into().unwrap());
|
||||
if test == 0x80371240 {
|
||||
// z64
|
||||
return contents;
|
||||
contents
|
||||
} else if test == 0x37804012 {
|
||||
// v64
|
||||
let mut data: Vec<u8> = vec![0; contents.len()];
|
||||
@ -128,7 +128,7 @@ fn get_rom_contents(file_path: &std::path::Path) -> Vec<u8> {
|
||||
contents = fs::read(file_path).expect("Should have been able to read the file");
|
||||
}
|
||||
|
||||
return swap_rom(contents);
|
||||
swap_rom(contents)
|
||||
}
|
||||
|
||||
fn main() {
|
||||
@ -141,13 +141,13 @@ fn main() {
|
||||
}
|
||||
if args.port.is_some() {
|
||||
let port = args.port.unwrap();
|
||||
if port < 1 || port > 4 {
|
||||
if !(1..=4).contains(&port) {
|
||||
println!("Port must be betwen 1 and 4");
|
||||
return;
|
||||
}
|
||||
}
|
||||
if args.list_controllers {
|
||||
ui::input::list_controllers(&mut device.ui);
|
||||
ui::input::list_controllers(&device.ui);
|
||||
return;
|
||||
}
|
||||
if args.assign_controller.is_some() {
|
||||
|
||||
@ -29,7 +29,7 @@ impl Drop for Ui {
|
||||
}
|
||||
}
|
||||
|
||||
fn write_config(ui: &mut Ui) {
|
||||
fn write_config(ui: &Ui) {
|
||||
let f = std::fs::File::create(ui.config_file_path.clone()).unwrap();
|
||||
serde_json::to_writer_pretty(f, &ui.config).unwrap();
|
||||
}
|
||||
@ -74,7 +74,7 @@ impl Ui {
|
||||
joystick: None,
|
||||
},
|
||||
],
|
||||
config_file_path: config_file_path,
|
||||
config_file_path,
|
||||
config: config_map,
|
||||
save_type: vec![],
|
||||
game_id: String::new(),
|
||||
|
||||
@ -34,7 +34,7 @@ impl Config {
|
||||
"default".to_string(),
|
||||
],
|
||||
controller_assignment: [None, None, None, None],
|
||||
input_profiles: input_profiles,
|
||||
input_profiles,
|
||||
},
|
||||
}
|
||||
}
|
||||
|
||||
@ -66,16 +66,16 @@ pub fn set_axis_from_joystick(
|
||||
if profile.joystick_axis[AXIS_DOWN].0 {
|
||||
let axis_position = joystick.axis(profile.joystick_axis[AXIS_DOWN].1).unwrap();
|
||||
if axis_position as isize * profile.joystick_axis[AXIS_DOWN].2 as isize > 0 {
|
||||
y = (axis_position as f64 * MAX_AXIS_VALUE as f64 / i16::MAX as f64).neg();
|
||||
y = (axis_position as f64 * MAX_AXIS_VALUE / i16::MAX as f64).neg();
|
||||
}
|
||||
}
|
||||
if profile.joystick_axis[AXIS_UP].0 {
|
||||
let axis_position = joystick.axis(profile.joystick_axis[AXIS_UP].1).unwrap();
|
||||
if axis_position as isize * profile.joystick_axis[AXIS_UP].2 as isize > 0 {
|
||||
y = (axis_position as f64 * MAX_AXIS_VALUE as f64 / i16::MAX as f64).neg();
|
||||
y = (axis_position as f64 * MAX_AXIS_VALUE / i16::MAX as f64).neg();
|
||||
}
|
||||
}
|
||||
return (x, y);
|
||||
(x, y)
|
||||
}
|
||||
|
||||
pub fn set_axis_from_controller(
|
||||
@ -103,17 +103,17 @@ pub fn set_axis_from_controller(
|
||||
let axis_position =
|
||||
controller.axis(std::mem::transmute(profile.controller_axis[AXIS_DOWN].1));
|
||||
if axis_position as isize * profile.controller_axis[AXIS_DOWN].2 as isize > 0 {
|
||||
y = (axis_position as f64 * MAX_AXIS_VALUE as f64 / i16::MAX as f64).neg();
|
||||
y = (axis_position as f64 * MAX_AXIS_VALUE / i16::MAX as f64).neg();
|
||||
}
|
||||
}
|
||||
if profile.controller_axis[AXIS_UP].0 {
|
||||
let axis_position =
|
||||
controller.axis(std::mem::transmute(profile.controller_axis[AXIS_UP].1));
|
||||
if axis_position as isize * profile.controller_axis[AXIS_UP].2 as isize > 0 {
|
||||
y = (axis_position as f64 * MAX_AXIS_VALUE as f64 / i16::MAX as f64).neg();
|
||||
y = (axis_position as f64 * MAX_AXIS_VALUE / i16::MAX as f64).neg();
|
||||
}
|
||||
}
|
||||
return (x, y);
|
||||
(x, y)
|
||||
}
|
||||
}
|
||||
|
||||
@ -124,27 +124,27 @@ pub fn set_axis_from_keys(
|
||||
unsafe {
|
||||
let mut x = 0.0;
|
||||
let mut y = 0.0;
|
||||
if profile.keys[AXIS_LEFT].0 {
|
||||
if keyboard_state.is_scancode_pressed(std::mem::transmute(profile.keys[AXIS_LEFT].1)) {
|
||||
x = -MAX_AXIS_VALUE
|
||||
}
|
||||
if profile.keys[AXIS_LEFT].0
|
||||
&& keyboard_state.is_scancode_pressed(std::mem::transmute(profile.keys[AXIS_LEFT].1))
|
||||
{
|
||||
x = -MAX_AXIS_VALUE
|
||||
}
|
||||
if profile.keys[AXIS_RIGHT].0 {
|
||||
if keyboard_state.is_scancode_pressed(std::mem::transmute(profile.keys[AXIS_RIGHT].1)) {
|
||||
x = MAX_AXIS_VALUE
|
||||
}
|
||||
if profile.keys[AXIS_RIGHT].0
|
||||
&& keyboard_state.is_scancode_pressed(std::mem::transmute(profile.keys[AXIS_RIGHT].1))
|
||||
{
|
||||
x = MAX_AXIS_VALUE
|
||||
}
|
||||
if profile.keys[AXIS_DOWN].0 {
|
||||
if keyboard_state.is_scancode_pressed(std::mem::transmute(profile.keys[AXIS_DOWN].1)) {
|
||||
y = -MAX_AXIS_VALUE
|
||||
}
|
||||
if profile.keys[AXIS_DOWN].0
|
||||
&& keyboard_state.is_scancode_pressed(std::mem::transmute(profile.keys[AXIS_DOWN].1))
|
||||
{
|
||||
y = -MAX_AXIS_VALUE
|
||||
}
|
||||
if profile.keys[AXIS_UP].0 {
|
||||
if keyboard_state.is_scancode_pressed(std::mem::transmute(profile.keys[AXIS_UP].1)) {
|
||||
y = MAX_AXIS_VALUE
|
||||
}
|
||||
if profile.keys[AXIS_UP].0
|
||||
&& keyboard_state.is_scancode_pressed(std::mem::transmute(profile.keys[AXIS_UP].1))
|
||||
{
|
||||
y = MAX_AXIS_VALUE
|
||||
}
|
||||
return (x, y);
|
||||
(x, y)
|
||||
}
|
||||
}
|
||||
|
||||
@ -160,25 +160,20 @@ pub fn set_buttons_from_joystick(
|
||||
}
|
||||
|
||||
let profile_joystick_hat = profile.joystick_hat[i];
|
||||
if profile_joystick_hat.0 {
|
||||
if joystick.hat(profile_joystick_hat.1).unwrap()
|
||||
if profile_joystick_hat.0
|
||||
&& joystick.hat(profile_joystick_hat.1).unwrap()
|
||||
== unsafe { std::mem::transmute(profile_joystick_hat.2) }
|
||||
{
|
||||
*keys |= 1 << i;
|
||||
}
|
||||
{
|
||||
*keys |= 1 << i;
|
||||
}
|
||||
|
||||
let profile_joystick_axis = profile.joystick_axis[i];
|
||||
if profile_joystick_axis.0 {
|
||||
let axis_position = unsafe {
|
||||
joystick
|
||||
.axis(std::mem::transmute(profile_joystick_axis.1))
|
||||
.unwrap()
|
||||
};
|
||||
if axis_position as isize * profile_joystick_axis.2 as isize > 0 {
|
||||
if axis_position.saturating_abs() > i16::MAX / 2 {
|
||||
*keys |= 1 << i;
|
||||
}
|
||||
let axis_position = joystick.axis(profile_joystick_axis.1).unwrap();
|
||||
if axis_position as isize * profile_joystick_axis.2 as isize > 0
|
||||
&& axis_position.saturating_abs() > i16::MAX / 2
|
||||
{
|
||||
*keys |= 1 << i;
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -201,10 +196,10 @@ pub fn set_buttons_from_controller(
|
||||
if profile_controller_axis.0 {
|
||||
let axis_position =
|
||||
unsafe { controller.axis(std::mem::transmute(profile_controller_axis.1)) };
|
||||
if axis_position as isize * profile_controller_axis.2 as isize > 0 {
|
||||
if axis_position.saturating_abs() > i16::MAX / 2 {
|
||||
*keys |= 1 << i;
|
||||
}
|
||||
if axis_position as isize * profile_controller_axis.2 as isize > 0
|
||||
&& axis_position.saturating_abs() > i16::MAX / 2
|
||||
{
|
||||
*keys |= 1 << i;
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -220,7 +215,7 @@ pub fn get(ui: &mut ui::Ui, channel: usize) -> u32 {
|
||||
let controller = &ui.controllers[channel].game_controller;
|
||||
let joystick = &ui.controllers[channel].joystick;
|
||||
for i in 0..14 {
|
||||
if profile_name != "default" || (channel == 0 && profile_name == "default") {
|
||||
if profile_name != "default" || channel == 0 {
|
||||
let profile_key = profile.keys[i];
|
||||
if profile_key.0 {
|
||||
unsafe {
|
||||
@ -241,7 +236,7 @@ pub fn get(ui: &mut ui::Ui, channel: usize) -> u32 {
|
||||
let mut x: f64 = 0.0;
|
||||
let mut y: f64 = 0.0;
|
||||
|
||||
if profile_name != "default" || (channel == 0 && profile_name == "default") {
|
||||
if profile_name != "default" || channel == 0 {
|
||||
(x, y) = set_axis_from_keys(profile, keyboard_state);
|
||||
}
|
||||
|
||||
@ -254,10 +249,10 @@ pub fn get(ui: &mut ui::Ui, channel: usize) -> u32 {
|
||||
|
||||
keys |= (x.round() as i8 as u8 as u32) << X_AXIS;
|
||||
keys |= (y.round() as i8 as u8 as u32) << Y_AXIS;
|
||||
return keys;
|
||||
keys
|
||||
}
|
||||
|
||||
pub fn list_controllers(ui: &mut ui::Ui) {
|
||||
pub fn list_controllers(ui: &ui::Ui) {
|
||||
let joystick_subsystem = ui.joystick_subsystem.as_ref().unwrap();
|
||||
let num_joysticks = joystick_subsystem.num_joysticks().unwrap();
|
||||
if num_joysticks == 0 {
|
||||
|
||||
@ -54,7 +54,7 @@ pub fn get_save_type(game_id: &str) -> Vec<SaveTypes> {
|
||||
"NEP" | // Star Wars Episode I: Racer
|
||||
"NYS" // Yoshi's Story
|
||||
=> {
|
||||
return vec![SaveTypes::Eeprom16k]
|
||||
vec![SaveTypes::Eeprom16k]
|
||||
}
|
||||
"NCC" | // Command & Conquer
|
||||
"NDA" | // Derby Stallion 64
|
||||
@ -76,12 +76,12 @@ pub fn get_save_type(game_id: &str) -> Vec<SaveTypes> {
|
||||
"NW4" | // WWF No Mercy
|
||||
"NDP" // Dinosaur Planet (Unlicensed)
|
||||
=>{
|
||||
return vec![SaveTypes::Flash]
|
||||
vec![SaveTypes::Flash]
|
||||
}
|
||||
"NPQ" // Powerpuff Girls: Chemical X Traction
|
||||
=> {return vec![];}
|
||||
=> {vec![]}
|
||||
_ => {
|
||||
return vec![SaveTypes::Eeprom4k, SaveTypes::Sram]
|
||||
vec![SaveTypes::Eeprom4k, SaveTypes::Sram]
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -146,12 +146,12 @@ pub fn load_saves(ui: &mut ui::Ui) {
|
||||
}
|
||||
}
|
||||
|
||||
pub fn write_rom_save(ui: &mut ui::Ui) {
|
||||
pub fn write_rom_save(ui: &ui::Ui) {
|
||||
let f = std::fs::File::create(ui.paths.romsave_file_path.clone()).unwrap();
|
||||
serde_json::to_writer(f, &ui.saves.romsave).unwrap();
|
||||
}
|
||||
|
||||
pub fn write_saves(ui: &mut ui::Ui) {
|
||||
pub fn write_saves(ui: &ui::Ui) {
|
||||
if ui.saves.eeprom.1 {
|
||||
write_save(ui, SaveTypes::Eeprom16k)
|
||||
}
|
||||
@ -169,7 +169,7 @@ pub fn write_saves(ui: &mut ui::Ui) {
|
||||
}
|
||||
}
|
||||
|
||||
pub fn write_save(ui: &mut ui::Ui, save_type: SaveTypes) {
|
||||
pub fn write_save(ui: &ui::Ui, save_type: SaveTypes) {
|
||||
let path: &std::path::Path;
|
||||
let data: &Vec<u8>;
|
||||
match save_type {
|
||||
|
||||
@ -30,8 +30,8 @@ pub fn init(ui: &mut ui::Ui, rdram_ptr: *mut u8, rdram_size: usize, fullscreen:
|
||||
|
||||
pub fn update_screen() -> u8 {
|
||||
// when the window is closed, running is set to 0
|
||||
let running = unsafe { rdp_update_screen() };
|
||||
return running;
|
||||
|
||||
unsafe { rdp_update_screen() }
|
||||
}
|
||||
|
||||
pub fn set_register(reg: u32, value: u32) {
|
||||
@ -41,8 +41,8 @@ pub fn set_register(reg: u32, value: u32) {
|
||||
}
|
||||
|
||||
pub fn process_rdp_list(dpc_regs: &mut [u32; 8], sp_dmem: &mut [u8; 8192]) -> u64 {
|
||||
let timer = unsafe { rdp_process_commands(dpc_regs, sp_dmem) };
|
||||
return timer;
|
||||
|
||||
unsafe { rdp_process_commands(dpc_regs, sp_dmem) }
|
||||
}
|
||||
|
||||
pub fn rdp_full_sync() {
|
||||
|
||||
Reference in New Issue
Block a user