From df9ad377d3c47facf9d40602345bccfa92f5b9fc Mon Sep 17 00:00:00 2001
From: Logan McNaughton <848146+loganmc10@users.noreply.github.com>
Date: Fri, 14 Feb 2025 10:07:58 +0100
Subject: [PATCH] add cycles for rsp mfc0 (#251)

* add cycles for rsp mfc0

* more
---
 src/device.rs                     | 1 +
 src/device/rdp.rs                 | 4 +++-
 src/device/rsp_cpu.rs             | 3 +++
 src/device/rsp_interface.rs       | 5 +++--
 src/device/rsp_su_instructions.rs | 1 +
 5 files changed, 11 insertions(+), 3 deletions(-)

diff --git a/src/device.rs b/src/device.rs
index 00c7278..02e3d6e 100644
--- a/src/device.rs
+++ b/src/device.rs
@@ -357,6 +357,7 @@ impl Device {
                         pc: 0,
                     },
                     broken: false,
+                    running: false,
                     halted: false,
                     sync_point: false,
                     cycle_counter: 0,
diff --git a/src/device/rdp.rs b/src/device/rdp.rs
index cd35441..d9e76ba 100644
--- a/src/device/rdp.rs
+++ b/src/device/rdp.rs
@@ -53,7 +53,9 @@ pub fn read_regs_dpc(
     address: u64,
     _access_size: device::memory::AccessSize,
 ) -> u32 {
-    device::cop0::add_cycles(device, 20);
+    if !device.rsp.cpu.running {
+        device::cop0::add_cycles(device, 20);
+    }
     let reg = (address & 0xFFFF) >> 2;
     match reg as u32 {
         DPC_STATUS_REG => {
diff --git a/src/device/rsp_cpu.rs b/src/device/rsp_cpu.rs
index fab7f51..7e382a6 100644
--- a/src/device/rsp_cpu.rs
+++ b/src/device/rsp_cpu.rs
@@ -34,6 +34,7 @@ pub struct Cpu {
     pub pipeline_full: bool,
     pub branch_state: BranchState,
     pub broken: bool,
+    pub running: bool,
     pub halted: bool,
     pub sync_point: bool,
     pub cycle_counter: u64,
@@ -125,6 +126,7 @@ pub fn in_delay_slot_taken(device: &device::Device) -> bool {
 pub fn run(device: &mut device::Device) -> u64 {
     device.rsp.cpu.broken = false;
     device.rsp.cpu.cycle_counter = 0;
+    device.rsp.cpu.running = true;
     while !device.rsp.cpu.sync_point {
         device.rsp.cpu.instruction_type = InstructionType::Su;
         device.rsp.cpu.gpr[0] = 0; // gpr 0 is read only
@@ -186,6 +188,7 @@ pub fn run(device: &mut device::Device) -> u64 {
             }
         }
     }
+    device.rsp.cpu.running = false;
     (device.rsp.cpu.cycle_counter as f64 * 1.5) as u64 // converting RCP clock to CPU clock
 }
 
diff --git a/src/device/rsp_interface.rs b/src/device/rsp_interface.rs
index bad92e8..2916cc3 100644
--- a/src/device/rsp_interface.rs
+++ b/src/device/rsp_interface.rs
@@ -267,7 +267,9 @@ pub fn read_regs(
     address: u64,
     _access_size: device::memory::AccessSize,
 ) -> u32 {
-    device::cop0::add_cycles(device, 20);
+    if !device.rsp.cpu.running {
+        device::cop0::add_cycles(device, 20);
+    }
     let reg = (address & 0xFFFF) >> 2;
     match reg as u32 {
         SP_DMA_BUSY_REG | SP_DMA_FULL_REG => {
@@ -292,7 +294,6 @@ pub fn read_regs(
             let value = device.rsp.regs[reg as usize];
             if value == 1 {
                 device.rsp.cpu.sync_point = true;
-                device.rsp.cpu.cycle_counter += 4; // needed for DK64
             }
             device.rsp.regs[reg as usize] = 1;
             value
diff --git a/src/device/rsp_su_instructions.rs b/src/device/rsp_su_instructions.rs
index 36ef6fd..eb8a6f5 100644
--- a/src/device/rsp_su_instructions.rs
+++ b/src/device/rsp_su_instructions.rs
@@ -552,6 +552,7 @@ pub fn bgezal(device: &mut device::Device, opcode: u32) {
 }
 
 pub fn mfc0(device: &mut device::Device, opcode: u32) {
+    device.rsp.cpu.cycle_counter += 2;
     if rd(opcode) < device::rsp_interface::SP_REGS_COUNT {
         device.rsp.cpu.gpr[rt(opcode) as usize] = device::rsp_interface::read_regs(
             device,